[PATCH v10 3/3] arm64: dts: mediatek: Initial mt8365-evk support

AngeloGioacchino Del Regno angelogioacchino.delregno at collabora.com
Thu Mar 9 07:21:29 PST 2023


Il 09/03/23 15:34, Bernhard Rosenkränzer ha scritto:
> From: Fabien Parent <fparent at baylibre.com>
> 
> This adds minimal support for the Mediatek 8365 SOC and the EVK reference
> board, allowing the board to boot to initramfs with serial port I/O.
> 
> Signed-off-by: Fabien Parent <fparent at baylibre.com>
> [bero at baylibre.com: Removed parts depending on drivers that aren't upstream yet, cleanups, add CPU cache layout, add systimer, fix GIC]
> Signed-off-by: Bernhard Rosenkränzer <bero at baylibre.com>
> [aouledameur at baylibre.com: Fix systimer properties]
> Signed-off-by: Amjad Ouled-Ameur <aouledameur at baylibre.com>
> Signed-off-by: Alexandre Mergnat <amergnat at baylibre.com>
> Tested-by: Kevin Hilman <khilman at baylibre.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
> ---
>   arch/arm64/boot/dts/mediatek/Makefile       |   1 +
>   arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 168 +++++++++
>   arch/arm64/boot/dts/mediatek/mt8365.dtsi    | 377 ++++++++++++++++++++
>   3 files changed, 546 insertions(+)
>   create mode 100644 arch/arm64/boot/dts/mediatek/mt8365-evk.dts
>   create mode 100644 arch/arm64/boot/dts/mediatek/mt8365.dtsi
> 

..snip..

> diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
> new file mode 100644
> index 0000000000000..5d6763ebcf869
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
> @@ -0,0 +1,377 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * (C) 2018 MediaTek Inc.
> + * Copyright (C) 2022 BayLibre SAS
> + * Fabien Parent <fparent at baylibre.com>
> + * Bernhard Rosenkränzer <bero at baylibre.com>
> + */

..snip..

> +
> +	systimer: timer at 10017000 {
> +		compatible = "mediatek,mt8365-systimer", "mediatek,mt6795-timer";

You mean "mediatek,67 -> 6 <- 5-timer", right? :-P

Cheers,
Angelo

> +		reg = <0 0x10017000 0 0x100>;
> +		interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&system_clk>;
> +		clock-names = "clk13m";
> +	};
> +};




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