[v5 PATCH 1/7] crypto: stm32 - Save 54 CSR registers

[Linus Walleij]

On Sat, Mar 4, 2023 at 10:37 AM Herbert Xu <herbert at gondor.apana.org.au> wrote:

> The CSR registers go from 0 to 53.  So the number of registers
> should be 54.
>
> Signed-off-by: Herbert Xu <herbert at gondor.apana.org.au>

Hm I don't know where this misunderstanding comes from.
I think it's this tendency by some engineers to use index 1 :/

The datasheet for U8500 says:
0xF8            HASH_CSFULL      HASH context full register
0xFC            HASH_CSDATAIN    HASH context swap data input register
0x100           HASH_CSR0        HASH context swap register 0
0x104 to 0x1CC  HASH_CSR1 to 51  HASH context swap register 1 to 51

0xf8, 0xfc, 0x100 = 3 registers
0x104 to 0x1cc = 51 registers

Indeed 54.

Reviewed-by: Linus Walleij <linus.walleij at linaro.org>
Tested-by: Linus Walleij <linus.walleij at linaro.org>

Yours,
Linus Walleij