[PATCH v2 5/8] arm64: dts: rockchip: add gpio-ranges property to gpio nodes
Kever Yang
kever.yang at rock-chips.com
Wed Mar 1 22:38:10 PST 2023
On 2023/1/21 19:09, Johan Jonker wrote:
> Add a gpio-ranges property to Rockchip gpio nodes to be
> independent from aliases and probe order for our bank id.
>
> Signed-off-by: Johan Jonker <jbx6244 at gmail.com>
Looks good to me, GPIO controller has 32 pin each bank, even if there
may have some empty bits.
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>
Thanks,
- Kever
> ---
>
> Number of pins per bank not checked with datasheet.
> Use default 32 for now.
> ---
> arch/arm64/boot/dts/rockchip/px30.dtsi | 4 ++++
> arch/arm64/boot/dts/rockchip/rk3308.dtsi | 5 +++++
> arch/arm64/boot/dts/rockchip/rk3328.dtsi | 4 ++++
> arch/arm64/boot/dts/rockchip/rk3368.dtsi | 4 ++++
> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 5 +++++
> arch/arm64/boot/dts/rockchip/rk356x.dtsi | 5 +++++
> 6 files changed, 27 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
> index 4f6959eb5..9fcc0d0f3 100644
> --- a/arch/arm64/boot/dts/rockchip/px30.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
> @@ -1387,6 +1387,7 @@
> interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&pmucru PCLK_GPIO0_PMU>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1399,6 +1400,7 @@
> interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO1>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1411,6 +1413,7 @@
> interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO2>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1423,6 +1426,7 @@
> interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO3>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 96 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
> index dd228a256..38976f413 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
> @@ -798,6 +798,7 @@
> interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO0>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -809,6 +810,7 @@
> interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO1>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -820,6 +822,7 @@
> interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO2>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -831,6 +834,7 @@
> interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO3>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 96 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -842,6 +846,7 @@
> interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO4>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 128 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> index 6d7a7bf72..7ba695728 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> @@ -1051,6 +1051,7 @@
> clocks = <&cru PCLK_GPIO0>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1064,6 +1065,7 @@
> clocks = <&cru PCLK_GPIO1>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1077,6 +1079,7 @@
> clocks = <&cru PCLK_GPIO2>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> @@ -1090,6 +1093,7 @@
> clocks = <&cru PCLK_GPIO3>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 96 32>;
> #gpio-cells = <2>;
>
> interrupt-controller;
> diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> index a4c5aaf1f..5a008ed18 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> @@ -984,6 +984,7 @@
> interrupts = <GIC_SPI 0x51 IRQ_TYPE_LEVEL_HIGH>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <0x2>;
>
> interrupt-controller;
> @@ -997,6 +998,7 @@
> interrupts = <GIC_SPI 0x52 IRQ_TYPE_LEVEL_HIGH>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <0x2>;
>
> interrupt-controller;
> @@ -1010,6 +1012,7 @@
> interrupts = <GIC_SPI 0x53 IRQ_TYPE_LEVEL_HIGH>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <0x2>;
>
> interrupt-controller;
> @@ -1023,6 +1026,7 @@
> interrupts = <GIC_SPI 0x54 IRQ_TYPE_LEVEL_HIGH>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 96 32>;
> #gpio-cells = <0x2>;
>
> interrupt-controller;
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index 1881b4b71..7eb96fcc6 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -2091,6 +2091,7 @@
> interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <0x2>;
>
> interrupt-controller;
> @@ -2104,6 +2105,7 @@
> interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <0x2>;
>
> interrupt-controller;
> @@ -2117,6 +2119,7 @@
> interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <0x2>;
>
> interrupt-controller;
> @@ -2130,6 +2133,7 @@
> interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 96 32>;
> #gpio-cells = <0x2>;
>
> interrupt-controller;
> @@ -2143,6 +2147,7 @@
> interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
>
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 128 32>;
> #gpio-cells = <0x2>;
>
> interrupt-controller;
> diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> index eed0059a6..870b4d9c6 100644
> --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> @@ -1808,6 +1808,7 @@
> interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -1819,6 +1820,7 @@
> interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 32 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -1830,6 +1832,7 @@
> interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 64 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -1841,6 +1844,7 @@
> interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 96 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> @@ -1852,6 +1856,7 @@
> interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
> gpio-controller;
> + gpio-ranges = <&pinctrl 0 128 32>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> --
> 2.20.1
>
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