[PATCH V5 0/3] Add support for Xilinx XDMA Soft IP as Root Port.
Thippeswamy Havalige
thippeswamy.havalige at amd.com
Wed Jun 28 02:28:09 PDT 2023
This series of patch add support for Xilinx XDMA Soft IP as Root Port.
The Xilinx XDMA Soft IP support's 32 bit and 64bit BAR's.
As Root Port it supports MSI and legacy interrupts.
For code reusability existing CPM4 error interrupt bits are moved to
common header.
Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige at amd.com>
Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada at amd.com>
---
Thippeswamy Havalige (3):
Move and rename error interrupt bits to a common header.
dt-bindings: PCI: xilinx-xdma: Add YAML schemas for Xilinx XDMA PCIe
Root Port Bridge
PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver
.../devicetree/bindings/pci/xlnx,xdma-host.yaml | 114 +++
drivers/pci/controller/Kconfig | 11 +
drivers/pci/controller/Makefile | 1 +
drivers/pci/controller/pcie-xilinx-common.h | 31 +
drivers/pci/controller/pcie-xilinx-cpm.c | 38 +-
drivers/pci/controller/pcie-xilinx-dma-pl.c | 803 +++++++++++++++++++++
6 files changed, 967 insertions(+), 31 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml
create mode 100644 drivers/pci/controller/pcie-xilinx-common.h
create mode 100644 drivers/pci/controller/pcie-xilinx-dma-pl.c
--
1.8.3.1
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