[PATCH] clk: rockchip: rk3568: Add PLL rate for 101MHz
Heiko Stuebner
heiko at sntech.de
Mon Jun 26 03:57:36 PDT 2023
On Wed, 14 Jun 2023 16:47:16 +0300, Alibek Omarov wrote:
> This patch adds PLL setting for not so common resolution as 1920x720-50.00,
> which can be set using 2500 horizontal signals and 808 vertical.
>
>
Applied, thanks!
[1/1] clk: rockchip: rk3568: Add PLL rate for 101MHz
commit: 294580c9b921946f0f6b964326ccbf2d1cd78f7a
Best regards,
--
Heiko Stuebner <heiko at sntech.de>
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