[PATCH v3 4/6] media: mediatek: vcodec: Define address for VDEC_HW_ACTIVE

[AngeloGioacchino Del Regno]

Il 20/06/23 02:03, Nícolas F. R. A. Prado ha scritto:
> The VDEC_HW_ACTIVE bit is located at offset 0, bit 4 of the VDECSYS
> iospace. Only the mask was previously defined, with the address being
> implicit. Explicitly define the address, and append a '_MASK' suffix to
> the mask, to make accesses to this bit clearer.
> 
> This commit brings no functional change.
> 
> Signed-off-by: Nícolas F. R. A. Prado <nfraprado at collabora.com>
> 
> ---
> 
> Changes in v3:
> - Added this commit
> 
>   drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c | 4 ++--
>   drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.c  | 4 ++--
>   drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.h  | 3 ++-
>   3 files changed, 6 insertions(+), 5 deletions(-)
> 

..snip..

> diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.h b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.h
> index 36faa8d9d681..caa2d0a48a90 100644
> --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.h
> +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.h
> @@ -12,7 +12,8 @@
>   
>   #include "mtk_vcodec_drv.h"
>   
> -#define VDEC_HW_ACTIVE 0x10
> +#define VDEC_HW_ACTIVE_ADDR 0x0
> +#define VDEC_HW_ACTIVE_MASK 0x10

#define VDEC_HW_ACTIVE_MASK	BIT(4)

...because it's a bit, as you wrote in the commit description :-)

Cheers,
Angelo

>   #define VDEC_IRQ_CFG 0x11
>   #define VDEC_IRQ_CLR 0x10
>   #define VDEC_IRQ_CFG_REG 0xa4