[PATCH] arm64: dts: ti: k3-j721s2: Change CPTS clock parent
Vignesh Raghavendra
vigneshr at ti.com
Thu Jun 15 06:29:54 PDT 2023
Hi Neha Malcom Francis,
On Mon, 05 Jun 2023 16:34:43 +0530, Neha Malcom Francis wrote:
> MAIN_PLL0 has a flag set in DM (Device Manager) that removes it's
> capability to re-initialise clock frequencies. CPTS and RGMII has
> MAIN_PLL3 as their parent which does not have this flag. While RGMII
> needs this reinitialisation to default frequency to be able to get
> 250MHz with its divider, CPTS can not get its required 200MHz with its
> divider. Thus, move CPTS clock parent on J721S2 from MAIN_PLL3_HSDIV1 to
> MAIN_PLL0_HSDIV6.
>
> [...]
I have applied the following to branch ti-k3-dts-next on [1].
Thank you!
[1/1] arm64: dts: ti: k3-j721s2: Change CPTS clock parent
commit: 1f36d0e8be3ae7717c801e954275fba6247b2f46
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[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Vignesh
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