[PATCH] mmc: mtk-sd: include bitfield header and fix incompatible pointer types

[Wenbin Mei]

The following error appeared due to the patch:
364dae3e80a4 "mmc: mtk-sd: reduce CIT for better performance"

drivers/mmc/host/mtk-sd.c: In function 'msdc_cqe_cit_cal':
drivers/mmc/host/cqhci.h:27:41: error: implicit declaration of function 'FIELD_GET' [-Werror=implicit-function-declaration]

drivers/mmc/host/mtk-sd.c:2471:3: error: incompatible pointer types passing 'unsigned long *' to parameter of type 'uint64_t *' (aka 'unsigned long long *') [-Werror,-Wincompatible-pointer-types]
    2471 |                 do_div(hclk_freq, 1000);
         |                 ^~~~~~~~~~~~~~~~~~~~~~~
include/asm-generic/div64.h:238:22: note: expanded from macro 'do_div'
     238 |                 __rem = __div64_32(&(n), __base);       \
include/asm-generic/div64.h:213:38: note: passing argument to parameter 'dividend' here
     213 | extern uint32_t __div64_32(uint64_t *dividend, uint32_t divisor);
...

This patch corrects the issue.

Reported-by: kernel test robot <lkp at intel.com>
Signed-off-by: Wenbin Mei <wenbin.mei at mediatek.com>
Fixes: 364dae3e80a4 ("mmc: mtk-sd: reduce CIT for better performance")
---
 drivers/mmc/host/cqhci.h  | 1 +
 drivers/mmc/host/mtk-sd.c | 5 ++---
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/host/cqhci.h b/drivers/mmc/host/cqhci.h
index e35c655edefc..1a12e40a02e6 100644
--- a/drivers/mmc/host/cqhci.h
+++ b/drivers/mmc/host/cqhci.h
@@ -5,6 +5,7 @@
 #define LINUX_MMC_CQHCI_H
 
 #include <linux/compiler.h>
+#include <linux/bitfield.h>
 #include <linux/bitops.h>
 #include <linux/spinlock_types.h>
 #include <linux/types.h>
diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
index b582f19f82f2..99317fd9f084 100644
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c
@@ -2456,15 +2456,14 @@ static void msdc_cqe_cit_cal(struct msdc_host *host, u64 timer_ns)
 	struct mmc_host *mmc = mmc_from_priv(host);
 	struct cqhci_host *cq_host = mmc->cqe_private;
 	u8 itcfmul;
-	unsigned long hclk_freq;
-	u64 value;
+	u64 hclk_freq, value;
 
 	/*
 	 * On MediaTek SoCs the MSDC controller's CQE uses msdc_hclk as ITCFVAL
 	 * so we multiply/divide the HCLK frequency by ITCFMUL to calculate the
 	 * Send Status Command Idle Timer (CIT) value.
 	 */
-	hclk_freq = clk_get_rate(host->h_clk);
+	hclk_freq = (u64)clk_get_rate(host->h_clk);
 	itcfmul = CQHCI_ITCFMUL(cqhci_readl(cq_host, CQHCI_CAP));
 	switch (itcfmul) {
 	case 0x0:
-- 
2.25.1