[PATCH 2/3] arm64: dts: qcom: sa8775p: Add interconnect to PCIe SMMU
Parikshit Pareek
quic_ppareek at quicinc.com
Thu Jun 8 22:41:41 PDT 2023
Introduce the interconnect, connecting PCIe SMMU to the memory. This
is accessed during memory mapped IO access of smmu registers, and
during page table walks.
Reported-by: Eric Chanudet <echanude at redhat.com>
Signed-off-by: Parikshit Pareek <quic_ppareek at quicinc.com>
---
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index b130136acffe..ea3c37019c46 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -2137,6 +2137,10 @@
<GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH>;
+ interconnects = <&pcie_anoc MASTER_PCIE_0 QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "tbu_mc";
+ icc_bw = <250>;
};
intc: interrupt-controller at 17a00000 {
--
2.17.1
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