[PATCH 10/12] mtd: rawnand: brcmnand: Add BCMBCA read data bus interface

William Zhang william.zhang at broadcom.com
Tue Jun 6 16:12:50 PDT 2023


The BCMBCA broadband SoC integrates the NAND controller differently than
STB, iProc and other SoCs.  It has different endianness for NAND cache
data and ONFI parameter data.

Add a SoC read data bus shim for BCMBCA to meet the specific SoC need
and performance improvement using the optimized memcpy function on NAND
cache memory.

Signed-off-by: William Zhang <william.zhang at broadcom.com>
---

 drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c | 36 +++++++++++++++++
 drivers/mtd/nand/raw/brcmnand/brcmnand.c    | 44 ++++++++++++++-------
 drivers/mtd/nand/raw/brcmnand/brcmnand.h    |  2 +
 3 files changed, 68 insertions(+), 14 deletions(-)

diff --git a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c
index 7e48b6a0bfa2..899103a62c98 100644
--- a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c
+++ b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c
@@ -26,6 +26,18 @@ enum {
 	BCMBCA_CTLRDY		= BIT(4),
 };
 
+#if defined(CONFIG_ARM64)
+#define ALIGN_REQ		8
+#else
+#define ALIGN_REQ		4
+#endif
+
+static inline bool bcmbca_nand_is_buf_aligned(void *flash_cache,  void *buffer)
+{
+	return IS_ALIGNED((uintptr_t)buffer, ALIGN_REQ) &&
+				IS_ALIGNED((uintptr_t)flash_cache, ALIGN_REQ);
+}
+
 static bool bcmbca_nand_intc_ack(struct brcmnand_soc *soc)
 {
 	struct bcmbca_nand_soc *priv =
@@ -56,6 +68,29 @@ static void bcmbca_nand_intc_set(struct brcmnand_soc *soc, bool en)
 	brcmnand_writel(val, mmio);
 }
 
+static void bcmbca_read_data_bus(struct brcmnand_soc *soc,
+				 void __iomem *flash_cache,  u32 *buffer,
+				 int fc_words, bool is_param)
+{
+	int i;
+
+	if (!is_param) {
+		/*
+		 * memcpy can do unaligned aligned access depending on source
+		 * and dest address, which is incompatible with nand cache. Fallback
+		 * to the memcpy for io version
+		 */
+		if (bcmbca_nand_is_buf_aligned(flash_cache, buffer))
+			memcpy((void *)buffer, (void *)flash_cache, fc_words * 4);
+		else
+			memcpy_fromio((void *)buffer, (void *)flash_cache, fc_words * 4);
+	} else {
+		/* Flash cache has same endian as the host for parameter pages */
+		for (i = 0; i < fc_words; i++, buffer++)
+			*buffer = __raw_readl(flash_cache + i * 4);
+	}
+}
+
 static int bcmbca_nand_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
@@ -75,6 +110,7 @@ static int bcmbca_nand_probe(struct platform_device *pdev)
 
 	soc->ctlrdy_ack = bcmbca_nand_intc_ack;
 	soc->ctlrdy_set_enabled = bcmbca_nand_intc_set;
+	soc->read_data_bus = bcmbca_read_data_bus;
 
 	return brcmnand_probe(pdev, soc);
 }
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index d920e88c7f5b..656be4d73016 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -814,6 +814,30 @@ static inline u32 edu_readl(struct brcmnand_controller *ctrl,
 	return brcmnand_readl(ctrl->edu_base + offs);
 }
 
+static inline void brcmnand_read_data_bus(struct brcmnand_controller *ctrl,
+					   void __iomem *flash_cache, u32 *buffer,
+					   int fc_words, bool is_param)
+{
+	struct brcmnand_soc *soc = ctrl->soc;
+	int i;
+
+	if (soc->read_data_bus) {
+		soc->read_data_bus(soc, flash_cache, buffer, fc_words, is_param);
+	} else {
+		if (!is_param) {
+			for (i = 0; i < fc_words; i++, buffer++)
+				*buffer = brcmnand_read_fc(ctrl, i);
+		} else {
+			for (i = 0; i < fc_words; i++)
+				/*
+				 * Flash cache is big endian for parameter pages, at
+				 * least on STB SoCs
+				 */
+				buffer[i] = be32_to_cpu(brcmnand_read_fc(ctrl, i));
+		}
+	}
+}
+
 static void brcmnand_clear_ecc_addr(struct brcmnand_controller *ctrl)
 {
 
@@ -1811,20 +1835,11 @@ static void brcmnand_cmdfunc(struct nand_chip *chip, unsigned command,
 			native_cmd == CMD_PARAMETER_CHANGE_COL) {
 		/* Copy flash cache word-wise */
 		u32 *flash_cache = (u32 *)ctrl->flash_cache;
-		int i;
 
 		brcmnand_soc_data_bus_prepare(ctrl->soc, true);
 
-		/*
-		 * Must cache the FLASH_CACHE now, since changes in
-		 * SECTOR_SIZE_1K may invalidate it
-		 */
-		for (i = 0; i < FC_WORDS; i++)
-			/*
-			 * Flash cache is big endian for parameter pages, at
-			 * least on STB SoCs
-			 */
-			flash_cache[i] = be32_to_cpu(brcmnand_read_fc(ctrl, i));
+		brcmnand_read_data_bus(ctrl, ctrl->nand_fc, flash_cache,
+				   FC_WORDS, true);
 
 		brcmnand_soc_data_bus_unprepare(ctrl->soc, true);
 
@@ -2137,7 +2152,7 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip,
 {
 	struct brcmnand_host *host = nand_get_controller_data(chip);
 	struct brcmnand_controller *ctrl = host->ctrl;
-	int i, j, ret = 0;
+	int i, ret = 0;
 
 	brcmnand_clear_ecc_addr(ctrl);
 
@@ -2150,8 +2165,9 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip,
 		if (likely(buf)) {
 			brcmnand_soc_data_bus_prepare(ctrl->soc, false);
 
-			for (j = 0; j < FC_WORDS; j++, buf++)
-				*buf = brcmnand_read_fc(ctrl, j);
+			brcmnand_read_data_bus(ctrl, ctrl->nand_fc, buf,
+					FC_WORDS, false);
+			buf += FC_WORDS;
 
 			brcmnand_soc_data_bus_unprepare(ctrl->soc, false);
 		}
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.h b/drivers/mtd/nand/raw/brcmnand/brcmnand.h
index f1f93d85f50d..88819bc395f8 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.h
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.h
@@ -24,6 +24,8 @@ struct brcmnand_soc {
 	void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en);
 	void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare,
 				 bool is_param);
+	void (*read_data_bus)(struct brcmnand_soc *soc, void __iomem *flash_cache,
+				 u32 *buffer, int fc_words, bool is_param);
 	const struct brcmnand_io_ops *ops;
 };
 
-- 
2.37.3

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