[PATCH v4 00/20] Permission Indirection Extension
Joey Gouly
joey.gouly at arm.com
Tue Jun 6 07:58:39 PDT 2023
Hi all,
This series implements the Permission Indirection Extension introduced in 2022
VMSA enhancements [1].
Changes since v3 [2]:
- Rebased onto for-next/feat_mops
- Enabled TCR2 in new HCRX_HOST_FLAGS/HCRX_GUEST_FLAGS
- Use ARM64_CPUID_FIELDS in cpufeature.c
- Add Marc Z's R-b tags
The Permission Indirection Extension is a new way to set memory permissions.
Instead of directly encoding the permission in the Page Table Entry (PTE),
fields in the PTEs are used to index into an array of permissions specified in
a register. This indirection provides greater flexibility, greater encoding
density and enables the representation of new permissions.
The PTEs bit that are repurposed for use with permission indirection are:
54 PTE_UXN
53 PTE_PXN
51 PTE_DBM
6 PTE_USER
The way that PIE is implemented in this patchset is that the encodings are
picked such that they match how Linux currently sets the bits in the PTEs, so
none of the page table handling has changed. This means this patchset keeps the
same functionality as currently implemented, but allows for future expansion.
Enabling PIE is also a prerequisite for implementing the Guarded Control Stack
Extension (GCS).
Another related extension is the Permission Overlay Extension, which is not
covered by this patch set, but is mentioned in patch 5 as half of PIE encoding
values apply an overlay. However, since overlays are not currently enabled, they
act as all the other permissions do.
This first few patches are adding the new system registers, and cpufeature
capabilities. Then KVM support for save/restore of the new registers is added.
Finally the new Permission Indirection registers are set and the new feature is
enabled.
Thanks,
Joey
[1] https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/arm-a-profile-architecture-2022
[2] http://lists.infradead.org/pipermail/linux-arm-kernel/2023-May/833014.html
Joey Gouly (20):
arm64/sysreg: Add ID register ID_AA64MMFR3
arm64/sysreg: add system registers TCR2_ELx
arm64/sysreg: update HCRX_EL2 register
arm64/sysreg: add PIR*_ELx registers
arm64: cpufeature: add system register ID_AA64MMFR3
arm64: cpufeature: add TCR2 cpucap
arm64: cpufeature: add Permission Indirection Extension cpucap
KVM: arm64: Save/restore TCR2_EL1
KVM: arm64: Save/restore PIE registers
KVM: arm64: expose ID_AA64MMFR3_EL1 to guests
arm64: add PTE_UXN/PTE_WRITE to SWAPPER_*_FLAGS
arm64: add PTE_WRITE to PROT_SECT_NORMAL
arm64: reorganise PAGE_/PROT_ macros
arm64: disable EL2 traps for PIE
arm64: add encodings of PIRx_ELx registers
arm64: enable Permission Indirection Extension (PIE)
arm64: transfer permission indirection settings to EL2
arm64: Document boot requirements for PIE
KVM: selftests: get-reg-list: support ID register features
KVM: selftests: get-reg-list: add Permission Indirection registers
Documentation/arm64/booting.rst | 26 +++
arch/arm64/include/asm/cpu.h | 1 +
arch/arm64/include/asm/el2_setup.h | 11 +-
arch/arm64/include/asm/kernel-pgtable.h | 8 +-
arch/arm64/include/asm/kvm_arm.h | 4 +-
arch/arm64/include/asm/kvm_host.h | 5 +
arch/arm64/include/asm/pgtable-hwdef.h | 8 +
arch/arm64/include/asm/pgtable-prot.h | 122 ++++++++++---
arch/arm64/include/asm/sysreg.h | 19 ++
arch/arm64/kernel/cpufeature.c | 24 +++
arch/arm64/kernel/cpuinfo.c | 1 +
arch/arm64/kernel/head.S | 8 +-
arch/arm64/kernel/hyp-stub.S | 18 ++
arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 12 ++
arch/arm64/kvm/sys_regs.c | 5 +-
arch/arm64/mm/proc.S | 19 +-
arch/arm64/tools/cpucaps | 2 +
arch/arm64/tools/sysreg | 165 +++++++++++++++++-
.../selftests/kvm/aarch64/get-reg-list.c | 53 +++++-
19 files changed, 467 insertions(+), 44 deletions(-)
--
2.25.1
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