[PATCH V2 1/2] arm64: dts: imx8mn-beacon: Add HDMI video with sound
Frieder Schrempf
frieder.schrempf at kontron.de
Tue Jun 6 00:13:24 PDT 2023
Hi Adam,
On 06.06.23 00:33, Adam Ford wrote:
> The Beacon Embedded imx8mn development kit has a DSI
> to HDMI bridge chip. The bridge supports stereo audio
> and hot-plug detection.
>
> Signed-off-by: Adam Ford <aford173 at gmail.com>
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn-beacon-kit.dts b/arch/arm64/boot/dts/freescale/imx8mn-beacon-kit.dts
> index 1392ce02587b..2108ec8c019c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn-beacon-kit.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mn-beacon-kit.dts
I have to minor comments below, otherwise this looks good to me.
As I'm trying to come up with similar changes for our boards I also have
some questions below. Maybe you could share your knowledge on these.
Thanks!
Frieder
> @@ -16,4 +16,138 @@ / {
> chosen {
> stdout-path = &uart2;
> };
> +
> + connector {
> + compatible = "hdmi-connector";
> + type = "a";
> +
> + port {
> + hdmi_connector_in: endpoint {
> + remote-endpoint = <&adv7535_out>;
> + };
> + };
> + };
> +
> + reg_hdmi: regulator-hdmi-dvdd {
> + compatible = "regulator-fixed";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_reg_hdmi>;
> + regulator-name = "hdmi_pwr_en";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + startup-delay-us = <70000>;
> + regulator-always-on;
> + };
> +
> + sound-hdmi {
> + compatible = "simple-audio-card";
> + simple-audio-card,name = "sound-hdmi";
> + simple-audio-card,format = "i2s";
> +
> + simple-audio-card,cpu {
> + sound-dai = <&sai5 0>;
> + system-clock-direction-out;
> + };
> +
> + simple-audio-card,codec {
> + sound-dai = <&adv_bridge>;
> + };
> + };
> +};
> +
> +&i2c2 {
> + adv_bridge: hdmi at 3d {
> + compatible = "adi,adv7535";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hdmi_bridge>;
> + reg = <0x3d>, <0x3b>;
> + reg-names = "main", "cec";
> + adi,dsi-lanes = <4>;
On our boards we have this working with 4 lanes. But we also have some
boards that only have 2 DSI lanes connected. We don't get any image in
on the display in this case. Did you ever try 2 lanes or do you have an
idea what could be wrong?
> + adi,fixed-lanes;
I think this property comes from downstream and should be removed. I
don't see it anywhere in the upstream driver or bindings.
> + dvdd-supply = <®_hdmi>;
> + v3p3-supply = <®_hdmi>;
> + v1p2-supply = <®_hdmi>;
> + a2vdd-supply = <®_hdmi>;
> + avdd-supply = <®_hdmi>;
> + pvdd-supply = <®_hdmi>;
Please sort the reg properties above alphabetically.
> + interrupt-parent = <&gpio1>;
> + interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
> + #sound-dai-cells = <0>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port at 0 {
> + reg = <0>;
> +
> + adv7535_in: endpoint {
> + remote-endpoint = <&dsi_out>;
> + };
> + };
> +
> + port at 1 {
> + reg = <1>;
> +
> + adv7535_out: endpoint {
> + remote-endpoint = <&hdmi_connector_in>;
> + };
> + };
> + };
> + };
> +};
> +
> +&lcdif {
> + assigned-clocks = <&clk IMX8MN_VIDEO_PLL1>;
> + assigned-clock-rates = <594000000>;
Just out of interest: Why do you need to set the video PLL clock here
and how did you determine the "correct" value? Why is this missing in
the i.MX8MM dts?
> + status = "okay";
> +};
> +
> +&mipi_dsi {
> + samsung,esc-clock-frequency = <20000000>;
Same here, I'm interested in how you determined the "correct" value for
this property. Are there any rules to follow?
> + status = "okay";
> +
> + ports {
> + port at 1 {
> + reg = <1>;
> +
> + dsi_out: endpoint {
> + remote-endpoint = <&adv7535_in>;
> + };
> + };
> + };
> +};
> +
> +&sai5 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_sai5>;
> + assigned-clocks = <&clk IMX8MN_CLK_SAI5>;
> + assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
> + assigned-clock-rates = <24576000>;
> + #sound-dai-cells = <0>;
> + status = "okay";
> +};
> +
> +&iomuxc {
> + pinctrl_hdmi_bridge: hdmibridgegrp {
> + fsl,pins = <
> + MX8MN_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19
> + >;
> + };
> +
> + pinctrl_reg_hdmi: reghdmigrp {
> + fsl,pins = <
> + MX8MN_IOMUXC_SD1_STROBE_GPIO2_IO11 0x16
> + >;
> + };
> +
> + pinctrl_sai5: sai5grp {
> + fsl,pins = <
> + MX8MN_IOMUXC_SAI5_RXD3_SAI5_TX_DATA0 0xd6
> + MX8MN_IOMUXC_SAI5_RXD2_SAI5_TX_BCLK 0xd6
> + MX8MN_IOMUXC_SAI5_RXD1_SAI5_TX_SYNC 0xd6
> + >;
> + };
> };
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