[REGRESSION][BISECT] perf/core: Remove pmu linear searching code
Ravi Bangoria
ravi.bangoria at amd.com
Mon Jun 5 03:03:15 PDT 2023
On 05-Jun-23 3:24 PM, Mark Rutland wrote:
> On Mon, Jun 05, 2023 at 03:04:45PM +0530, Ravi Bangoria wrote:
>> On 05-Jun-23 12:40 PM, Mark Rutland wrote:
>>> On Sun, Jun 04, 2023 at 01:38:10PM +0200, Krzysztof Kozlowski wrote:
>>>> Hi,
>>>>
>>>> #regzbot introduced: 9551fbb64d09
>>>>
>>>> Bisect pointed to commit 9551fbb64d09 ("perf/core: Remove pmu linear
>>>> searching code") as first one where all hardware events are gone from
>>>> perf for ARMv7 Exynos5422 board.
>>>
>>> I think that commit 9551fbb64d09 is just wrong.
>>>
>>> The commit message asserts:
>>>
>>> Searching for the right pmu by iterating over all pmus is no longer
>>> required since all pmus now *must* be present in the 'pmu_idr' list.
>>> So, remove linear searching code.
>>>
>>> ... and while each PMU has *some* entry in the pmu_idr list, for its dynamic
>>> type, that means that events with other types (e.g. PERF_TYPE_HARDWARE or
>>> PERF_TYPE_RAW) will fail to find a PMU in the IDR whereas they'd previously
>>> have been accepted by a PMU during the subsequent iteration over all PMUs.
>>
>> Not sure I follow.
>>
>> PERF_TYPE_HARDWARE and PERF_TYPE_HW_CACHE are aliased to PERF_TYPE_RAW in
>> perf_init_event(). And PERF_TYPE_RAW should be present in pmu_idr if it
>> was registered using:
>>
>> perf_pmu_register(pmu, "name", PERF_TYPE_RAW);
>
> As I said, the PMUs get registered with a dynamic type, and there's no
> registration with PERF_TYPE_RAW. On arm/arm64 systems, *every* CPU PMU gets
> registered with:
>
> perf_pmu_register(pmu, name, -1);
>
> ... and *none* are registered with:
>
> perf_pmu_register(pmu, name, PERF_TYPE_RAW)
>
> ... so those all get a dynamic IDR type, and nothing gets placed into the IDR
> for PERF_TYPE_RAW, etc. We rely on the linear search to find a PMU that can
> handle PERF_TYPE_RAW, etc.
Got it. Thanks for the clarification.
Ravi
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