[PATCH v3 09/20] KVM: arm64: Save/restore PIE registers

[Catalin Marinas]

On Thu, May 11, 2023 at 12:03:26PM +0100, Joey Gouly wrote:
> Define the new system registers that PIE introduces and context switch them.
> The PIE feature is still hidden from the ID register, and not exposed to a VM.
> 
> Signed-off-by: Joey Gouly <joey.gouly at arm.com>
> Cc: Marc Zyngier <maz at kernel.org>
> Cc: Oliver Upton <oliver.upton at linux.dev>
> Cc: James Morse <james.morse at arm.com>
> Cc: Suzuki K Poulose <suzuki.poulose at arm.com>
> Cc: Zenghui Yu <yuzenghui at huawei.com>
> Cc: Catalin Marinas <catalin.marinas at arm.com>
> Cc: Will Deacon <will at kernel.org>
> Reviewed-by: Catalin Marinas <catalin.marinas at arm.com>
> ---
>  arch/arm64/include/asm/kvm_host.h          | 4 ++++
>  arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 8 ++++++++
>  arch/arm64/kvm/sys_regs.c                  | 2 ++
>  3 files changed, 14 insertions(+)
> 
> diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
> index f2cfb9ef1eeb..d9f079fbdaf4 100644
> --- a/arch/arm64/include/asm/kvm_host.h
> +++ b/arch/arm64/include/asm/kvm_host.h
> @@ -340,6 +340,10 @@ enum vcpu_sysreg {
>  	TFSR_EL1,	/* Tag Fault Status Register (EL1) */
>  	TFSRE0_EL1,	/* Tag Fault Status Register (EL0) */
>  
> +	/* Permission Indirection Extension registers */
> +	PIR_EL1,       /* Permission Indirection Register 1 (EL1) */
> +	PIRE0_EL1,     /*  Permission Indirection Register 0 (EL1) */

These have been moved outside of the *_EL2 range as Marc asked. It looks
fine to me, waiting for an Ack from Marc/Oliver.

-- 
Catalin