[PATCH V2 09/14] arm64/sysreg: Convert TRBPTR_EL1 register to automatic generation
Anshuman Khandual
anshuman.khandual at arm.com
Thu Jun 1 23:25:47 PDT 2023
This converts TRBPTR_EL1 register to automatic generation without
causing any functional change.
Cc: Catalin Marinas <catalin.marinas at arm.com>
Cc: Will Deacon <will at kernel.org>
Cc: Marc Zyngier <maz at kernel.org>
Cc: Mark Brown <broonie at kernel.org>
Cc: Rob Herring <robh at kernel.org>
Cc: Suzuki K Poulose <suzuki.poulose at arm.com>
Cc: James Morse <james.morse at arm.com>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual at arm.com>
---
arch/arm64/include/asm/sysreg.h | 3 ---
arch/arm64/tools/sysreg | 4 ++++
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 643b7ccf6172..13b144075381 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -235,15 +235,12 @@
/*** End of Statistical Profiling Extension ***/
-#define SYS_TRBPTR_EL1 sys_reg(3, 0, 9, 11, 1)
#define SYS_TRBBASER_EL1 sys_reg(3, 0, 9, 11, 2)
#define SYS_TRBSR_EL1 sys_reg(3, 0, 9, 11, 3)
#define SYS_TRBMAR_EL1 sys_reg(3, 0, 9, 11, 4)
#define SYS_TRBTRG_EL1 sys_reg(3, 0, 9, 11, 6)
#define SYS_TRBIDR_EL1 sys_reg(3, 0, 9, 11, 7)
-#define TRBPTR_EL1_PTR_MASK GENMASK_ULL(63, 0)
-#define TRBPTR_EL1_PTR_SHIFT 0
#define TRBBASER_EL1_BASE_MASK GENMASK_ULL(63, 12)
#define TRBBASER_EL1_BASE_SHIFT 12
#define TRBSR_EL1_EC_MASK GENMASK(31, 26)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index a43309607d42..ad6da3ea1cd5 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -2218,3 +2218,7 @@ Enum 2:1 FM
EndEnum
Field 0 E
EndSysreg
+
+Sysreg TRBPTR_EL1 3 0 9 11 1
+Field 63:0 PTR
+EndSysreg
--
2.25.1
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