[EXT] Re: [PATCH v2 2/3] perf/imx_ddr: adjust counter result after read cycle counter

[Xu Yang]

Hi Mark,

> On Thu, Jul 13, 2023 at 06:37:57PM +0800, Xu Yang wrote:
> > Because we initialize CP filed to shorten counter0 overflow time, the cycle
> > counter will start couting from a fixed/base value each time. We need to
> > remove the base from the result too. Therefore, we could get precise result
> > from cycle counter.
> 
> This means that patch 1 is incomplete; please fold this into patch 1.

Okay.

> 
> >
> > Signed-off-by: Xu Yang <xu.yang_2 at nxp.com>
> >
> > ---
> > Changes in v2:
> >  - improve if condition
> > ---
> >  drivers/perf/fsl_imx8_ddr_perf.c | 6 ++++++
> >  1 file changed, 6 insertions(+)
> >
> > diff --git a/drivers/perf/fsl_imx8_ddr_perf.c b/drivers/perf/fsl_imx8_ddr_perf.c
> > index 039069756bbc..d65200d4e96e 100644
> > --- a/drivers/perf/fsl_imx8_ddr_perf.c
> > +++ b/drivers/perf/fsl_imx8_ddr_perf.c
> > @@ -481,6 +481,12 @@ static void ddr_perf_event_update(struct perf_event *event)
> >       int ret;
> >
> >       new_raw_count = ddr_perf_read_counter(pmu, counter);
> > +     /* Workaround for i.MX8MP */
> > +     if (pmu->devtype_data->quirks & DDR_CAP_AXI_ID_FILTER_ENHANCED) {
> > +             if (counter == EVENT_CYCLES_COUNTER)
> > +                     new_raw_count -= 0xF0000000;
> > +     }
> 
> I think as Frank suggested, it would be clearer to have a mask, and I think
> this should have a comment:

Agree, I'm going to update the code as following too.

Thanks,
Xu Yang

> 
>         /*
>          * Remove the bias applied in ddr_perf_counter_enable().
>          */
>         if (pmu->devtype_data->quirks & DDR_CAP_AXI_ID_FILTER_ENHANCED) {
>                 if (counter == EVENT_CYCLES_COUNTER)
>                         new_raw_count &= 0x0fffffff;
>         }
> 
> Thanks,
> Mark.
> 
> > +
> >       local64_add(new_raw_count, &event->count);
> >
> >       /*
> > --
> > 2.34.1
> >