[PATCH V2 8/9] arm64: dts: qcom: add IPQ5332 SoC and MI01.2 board support

[Kathiravan T]

On 2/1/2023 12:56 AM, Krzysztof Kozlowski wrote:
> On 30/01/2023 12:47, Kathiravan Thirumoorthy wrote:
>> From: Kathiravan T <quic_kathirav at quicinc.com>
>>
>> Add initial device tree support for the Qualcomm IPQ5332 SoC and
>> MI01.2 board.
>>
>> Signed-off-by: Kathiravan T <quic_kathirav at quicinc.com>
>
>> +		sdhc: mmc at 7804000 {
>> +			compatible = "qcom,ipq5332-sdhci", "qcom,sdhci-msm-v5";
>> +			reg = <0x07804000 0x1000>, <0x07805000 0x1000>;
>> +
>> +			interrupts = <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>;
>> +			interrupt-names = "hc_irq", "pwr_irq";
>> +
>> +			clocks = <&gcc GCC_SDCC1_AHB_CLK>,
>> +				 <&gcc GCC_SDCC1_APPS_CLK>,
>> +				 <&xo_board>;
>> +			clock-names = "iface", "core", "xo";
>> +			mmc-ddr-1_8v;
>> +			mmc-hs200-1_8v;
> No, our discussion did not finish. These are not properties of the SoC
> in most cases. Why do you say there are part of the SoC? Is your SoC
> coming with the same memory? Memory embedded in the SoC, not in the
> board? If yes, the status is incorrect.


Thanks. Got your point, will move the below properties to the board DTS 
in V3.

mmc-ddr-1_8v;
mmc-hs200-1_8v;
max-frequency = <192000000>;
bus-width = <4>;


>
>> +			max-frequency = <192000000>;
> Same
>
>
> Best regards,
> Krzysztof
>