[PATCH v2 0/5] arm64: pseudo-nmi: elide code when CONFIG_ARM64_PSEUDO_NMI=n

[Marc Zyngier]

On Wed, 25 Jan 2023 16:38:21 +0000,
Mark Rutland <mark.rutland at arm.com> wrote:
> 
> This series addresses a couple of sub-optimal code generation issues with
> arm64's pseudo-nmi support code:
> 
> * Even when CONFIG_ARM64_PSEUDO_NMI=n, we generate alternative code
>   sequences and alt_instr entries which will never be used. This series
>   reworks the irqflags code to use alternative branches (with an
>   IS_ENABLED() check), which allows the alternatives to be elided when
>   CONFIG_ARM64_PSEUDO_NMI=n.
> 
> * When PMHE is eanbled in HW, we must synchronize PMR updates using a
>   DSB SY. We take pains to avoid this using a static key to skip the
>   barrier when PMHE is not in use, but this results in unnecessarily
>   branchy code. This series replaces the static key with an alternative,
>   allowing the DSB SY to be relaxed to a NOP.
> 
> These changes make a defconfig kernel a little smaller, and does not
> adversely affect the size of a CONFIG_ARM64_PSEUDO_NMI=y kernel. The
> structural changes will also make it easier for a subsequent series to
> rework the irqflag and daifflag management, addressing some
> long-standing edge cases and preparing for ARMv8.8-A's FEAT_NMI.
> 
> I've tested this series under a QEM KVM VM on a ThunderX2 host, and a
> QEMU TCG VM on an x86_64 host. I've tested with and without pseudo-NMI
> support enabled, and with pseudo-NMI debug and lockdep enabled, using
> perf record in system-wide mode.

With the couple of nits I mentioned on individual patches addressed:

Reviewed-by: Marc Zyngier <maz at kernel.org>

	M.

-- 
Without deviation from the norm, progress is not possible.