[PATCH v3 1/2] arm64: dts: imx8mm: Deduplicate PCIe clock-names property
Hongxing Zhu
hongxing.zhu at nxp.com
Mon Jan 16 19:35:43 PST 2023
Hi Marek:
> -----Original Message-----
> From: Marek Vasut <marex at denx.de>
> Sent: 2023年1月16日 18:14
> To: linux-arm-kernel at lists.infradead.org
> Cc: Marek Vasut <marex at denx.de>; Alexander Stein
> <alexander.stein at ew.tq-group.com>; Fabio Estevam <festevam at denx.de>;
> Peng Fan <peng.fan at nxp.com>; Hongxing Zhu <hongxing.zhu at nxp.com>;
> Shawn Guo <shawnguo at kernel.org>; dl-linux-imx <linux-imx at nxp.com>
> Subject: [PATCH v3 1/2] arm64: dts: imx8mm: Deduplicate PCIe clock-names
> property
>
> Move the PCIe clock-names property from various DTs into SoC dtsi to reduce
> duplication. In case of a couple of boards, reorder the clock so they match the
> order in yaml DT bindings.
>
> Reviewed-by: Alexander Stein <alexander.stein at ew.tq-group.com> #
> imx8mm.dtsi, imx8mm-tqma8mqml-mba8mx.dts
> Signed-off-by: Marek Vasut <marex at denx.de>
Thanks for your patch.
Reviewed-by: Richard Zhu <hongxing.zhu at nxp.com>
Best Regards
Richard Zhu
> ---
> Cc: Fabio Estevam <festevam at denx.de>
> Cc: Peng Fan <peng.fan at nxp.com>
> Cc: Richard Zhu <hongxing.zhu at nxp.com>
> Cc: Shawn Guo <shawnguo at kernel.org>
> Cc: NXP Linux Team <linux-imx at nxp.com>
> To: linux-arm-kernel at lists.infradead.org
> ---
> V2: - Add RB from Alex
> - Fix venice build
> - Add default pcie clock entry into dtsi
> V3: - Drop clocks altogether from imx8mm-innocomm-wb15.dtsi
> imx8mm-phyboard-polis-rdk.dts imx8mm-verdin.dtsi
> as they are identical to imx8mm.dtsi
> ---
> arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi | 5 ++---
> arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts | 5 ++---
> arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 5 ++---
> arch/arm64/boot/dts/freescale/imx8mm-innocomm-wb15.dtsi | 3 ---
> arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts | 3 ---
> arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts | 5
> ++---
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi | 5 ++---
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi | 5 ++---
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi | 5 ++---
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts | 5 ++---
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts | 5 ++---
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts | 5 ++---
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts | 5 ++---
> arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 4 ----
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 4 ++++
> 15 files changed, 26 insertions(+), 43 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
> index 169f047fbca50..bc531175ff765 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
> @@ -241,9 +241,8 @@ &pcie0 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_pcie0>;
> reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
> - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk
> IMX8MM_CLK_PCIE1_AUX>,
> - <&pcie0_refclk_gated>;
> - clock-names = "pcie", "pcie_aux", "pcie_bus";
> + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk_gated>,
> + <&clk IMX8MM_CLK_PCIE1_AUX>;
> assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
> <&clk IMX8MM_CLK_PCIE1_CTRL>;
> assigned-clock-rates = <10000000>, <250000000>; diff --git
> a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts
> b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts
> index 9889319d4f045..b1f2beb40a98f 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts
> @@ -905,9 +905,8 @@ &pcie0 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_pcie0>;
> reset-gpio = <&gpio1 5 GPIO_ACTIVE_LOW>;
> - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk
> IMX8MM_CLK_PCIE1_AUX>,
> - <&pcieclk 0>;
> - clock-names = "pcie", "pcie_aux", "pcie_bus";
> + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcieclk 0>,
> + <&clk IMX8MM_CLK_PCIE1_AUX>;
> assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
> <&clk IMX8MM_CLK_PCIE1_CTRL>;
> assigned-clock-rates = <10000000>, <250000000>; diff --git
> a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> index e0b604ac0da4f..0ce3005d578d2 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> @@ -360,9 +360,8 @@ &pcie0 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_pcie0>;
> reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
> - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk
> IMX8MM_CLK_PCIE1_AUX>,
> - <&pcie0_refclk>;
> - clock-names = "pcie", "pcie_aux", "pcie_bus";
> + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,
> + <&clk IMX8MM_CLK_PCIE1_AUX>;
> assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
> <&clk IMX8MM_CLK_PCIE1_CTRL>;
> assigned-clock-rates = <10000000>, <250000000>; diff --git
> a/arch/arm64/boot/dts/freescale/imx8mm-innocomm-wb15.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm-innocomm-wb15.dtsi
> index 44e87b1568e79..299752aa82772 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-innocomm-wb15.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-innocomm-wb15.dtsi
> @@ -210,9 +210,6 @@ &pcie0 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_pcie0>;
> reset-gpio = <&gpio5 21 GPIO_ACTIVE_LOW>;
> - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk
> IMX8MM_CLK_PCIE1_PHY>,
> - <&clk IMX8MM_CLK_PCIE1_AUX>;
> - clock-names = "pcie", "pcie_bus", "pcie_aux";
> fsl,max-link-speed = <1>;
> assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, <&clk
> IMX8MM_CLK_PCIE1_CTRL>;
> assigned-clock-rates = <10000000>, <250000000>; diff --git
> a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts
> b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts
> index 4a3df2b77b0be..266129b4a70d9 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts
> @@ -175,9 +175,6 @@ &pcie0 {
> assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
> <&clk IMX8MM_SYS_PLL2_250M>;
> assigned-clock-rates = <10000000>, <250000000>;
> - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk
> IMX8MM_CLK_PCIE1_AUX>,
> - <&clk IMX8MM_CLK_PCIE1_PHY>;
> - clock-names = "pcie", "pcie_aux", "pcie_bus";
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_pcie>;
> reset-gpio = <&gpio4 9 GPIO_ACTIVE_LOW>; diff --git
> a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts
> b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts
> index a0aeac6199299..156d793a0c972 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts
> @@ -79,9 +79,8 @@ &pcie_phy {
>
> &pcie0 {
> reset-gpio = <&expander0 14 GPIO_ACTIVE_LOW>;
> - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk
> IMX8MM_CLK_PCIE1_AUX>,
> - <&pcie0_refclk>;
> - clock-names = "pcie", "pcie_aux", "pcie_bus";
> + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,
> + <&clk IMX8MM_CLK_PCIE1_AUX>;
> assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
> <&clk IMX8MM_CLK_PCIE1_CTRL>;
> assigned-clock-rates = <10000000>, <250000000>; diff --git
> a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi
> index c557dbf4dcd60..0ce60ad9c7d50 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi
> @@ -120,9 +120,8 @@ &pcie0 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_pcie0>;
> reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>;
> - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk
> IMX8MM_CLK_PCIE1_AUX>,
> - <&pcie0_refclk>;
> - clock-names = "pcie", "pcie_aux", "pcie_bus";
> + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,
> + <&clk IMX8MM_CLK_PCIE1_AUX>;
> assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
> <&clk IMX8MM_CLK_PCIE1_CTRL>;
> assigned-clock-rates = <10000000>, <250000000>; diff --git
> a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
> index 41d0de6a7027b..570992a52b759 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
> @@ -142,9 +142,8 @@ &pcie0 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_pcie0>;
> reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>;
> - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk
> IMX8MM_CLK_PCIE1_AUX>,
> - <&pcie0_refclk>;
> - clock-names = "pcie", "pcie_aux", "pcie_bus";
> + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,
> + <&clk IMX8MM_CLK_PCIE1_AUX>;
> assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
> <&clk IMX8MM_CLK_PCIE1_CTRL>;
> assigned-clock-rates = <10000000>, <250000000>; diff --git
> a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
> index 7761d5671cb13..1800c6a4b1fc6 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
> @@ -162,9 +162,8 @@ &pcie0 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_pcie0>;
> reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>;
> - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk
> IMX8MM_CLK_PCIE1_AUX>,
> - <&pcie0_refclk>;
> - clock-names = "pcie", "pcie_aux", "pcie_bus";
> + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,
> + <&clk IMX8MM_CLK_PCIE1_AUX>;
> assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
> <&clk IMX8MM_CLK_PCIE1_CTRL>;
> assigned-clock-rates = <10000000>, <250000000>; diff --git
> a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
> b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
> index 64b366e83fa14..df3b2c93d2d58 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
> @@ -702,9 +702,8 @@ &pcie0 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_pcie0>;
> reset-gpio = <&gpio5 2 GPIO_ACTIVE_LOW>;
> - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk
> IMX8MM_CLK_PCIE1_AUX>,
> - <&pcie0_refclk>;
> - clock-names = "pcie", "pcie_aux", "pcie_bus";
> + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,
> + <&clk IMX8MM_CLK_PCIE1_AUX>;
> assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
> <&clk IMX8MM_CLK_PCIE1_CTRL>;
> assigned-clock-rates = <10000000>, <250000000>; diff --git
> a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
> b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
> index e8bc1fccc47be..c33ec6826d324 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
> @@ -623,9 +623,8 @@ &pcie0 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_pcie0>;
> reset-gpio = <&gpio4 5 GPIO_ACTIVE_LOW>;
> - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk
> IMX8MM_CLK_PCIE1_AUX>,
> - <&pcie0_refclk>;
> - clock-names = "pcie", "pcie_aux", "pcie_bus";
> + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,
> + <&clk IMX8MM_CLK_PCIE1_AUX>;
> assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
> <&clk IMX8MM_CLK_PCIE1_CTRL>;
> assigned-clock-rates = <10000000>, <250000000>; diff --git
> a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
> b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
> index acc2ba8e00a88..363020a08c9b8 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
> @@ -557,9 +557,8 @@ &pcie0 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_pcie0>;
> reset-gpio = <&gpio5 11 GPIO_ACTIVE_LOW>;
> - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk
> IMX8MM_CLK_PCIE1_AUX>,
> - <&pcie0_refclk>;
> - clock-names = "pcie", "pcie_aux", "pcie_bus";
> + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,
> + <&clk IMX8MM_CLK_PCIE1_AUX>;
> assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
> <&clk IMX8MM_CLK_PCIE1_CTRL>;
> assigned-clock-rates = <10000000>, <250000000>; diff --git
> a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts
> b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts
> index eceed9816f5dc..93088fa1c3b9c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts
> @@ -618,9 +618,8 @@ &pcie0 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_pcie0>;
> reset-gpio = <&gpio5 11 GPIO_ACTIVE_LOW>;
> - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk
> IMX8MM_CLK_PCIE1_AUX>,
> - <&pcie0_refclk>;
> - clock-names = "pcie", "pcie_aux", "pcie_bus";
> + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,
> + <&clk IMX8MM_CLK_PCIE1_AUX>;
> assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
> <&clk IMX8MM_CLK_PCIE1_CTRL>;
> assigned-clock-rates = <10000000>, <250000000>; diff --git
> a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> index 7e8b3b0fa3066..5b2493bb8dd93 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> @@ -657,10 +657,6 @@ &pcie0 {
> assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
> <&clk IMX8MM_SYS_PLL2_250M>;
> assigned-clock-rates = <10000000>, <250000000>;
> - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>,
> - <&clk IMX8MM_CLK_PCIE1_AUX>,
> - <&clk IMX8MM_CLK_PCIE1_PHY>;
> - clock-names = "pcie", "pcie_aux", "pcie_bus";
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_pcie0>;
> /* PCIE_1_RESET# (SODIMM 244) */
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index 04cf2c3c9928b..31f4548f85cfa 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -1302,6 +1302,10 @@ pcie0: pcie at 33800000 {
> <0 0 0 4 &gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
> fsl,max-link-speed = <2>;
> linux,pci-domain = <0>;
> + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>,
> + <&clk IMX8MM_CLK_PCIE1_PHY>,
> + <&clk IMX8MM_CLK_PCIE1_AUX>;
> + clock-names = "pcie", "pcie_bus", "pcie_aux";
> power-domains = <&pgc_pcie>;
> resets = <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>,
> <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>;
> --
> 2.39.0
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