[PATCH 4/5] KVM: arm64: Correctly handle page aging notifiers for unaligned memlsot

[Marc Zyngier]

On Wed, 11 Jan 2023 00:02:59 +0000,
Oliver Upton <oliver.upton at linux.dev> wrote:
> 
> Userspace is allowed to select any PAGE_SIZE aligned hva to back guest
> memory. This is even the case with hugepages, although it is a rather
> suboptimal configuration as PTE level mappings are used at stage-2.
> 
> The page aging notifiers have an assumption that the spefified range
> is exactly one page/block of memory, which in the aforementioned case is
> not necessarily true. All together this leads to a rather obvious kernel
> WARN when using an unaligned memslot:
> 
> However, the WARN is only part of the issue as the table walkers visit
> at most a single leaf PTE. For hugepage-backed memory that is at a
> suboptimal alignment in the memslot, page aging entirely misses accesses
> to the hugepage at an offset greater than PAGE_SIZE.
> 
> Pass through the size of the notifier range to the table walkers and
> traverse the full range of memory requested. While at it, drop the WARN
> from before as it is clearly a valid condition.

Rather than changing the low-level walker, with the oddity that it
generates (patch #3), couldn't we instead just iterate over the range
and only process one entry at a time? All we need to know is the level
of the last processed entry to progress to the following block...

Thoughts?

	M.

-- 
Without deviation from the norm, progress is not possible.