[PATCH 7/9] arm64: dts: mediatek: mt8186: Add DPI node
Chen-Yu Tsai
wenst at chromium.org
Thu Jan 12 03:48:58 PST 2023
On Wed, Jan 11, 2023 at 8:37 PM Allen-KH Cheng
<allen-kh.cheng at mediatek.com> wrote:
>
> Add DPI node for MT8186 SoC.
>
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng at mediatek.com>
> ---
> arch/arm64/boot/dts/mediatek/mt8186.dtsi | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> index c52f9be1e750..eab30ab01572 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> @@ -1230,6 +1230,23 @@
> power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
> };
>
> + dpi0: dpi at 1400a000 {
You could drop the trailing 0 in the label, since there is only one
instance.
Tested-by: Chen-Yu Tsai <wenst at chromium.org>
> + compatible = "mediatek,mt8186-dpi";
> + reg = <0 0x1400a000 0 0x1000>;
> + clocks = <&topckgen CLK_TOP_DPI>,
> + <&mmsys CLK_MM_DISP_DPI>,
> + <&apmixedsys CLK_APMIXED_TVDPLL>;
> + clock-names = "pixel", "engine", "pll";
> + assigned-clocks = <&topckgen CLK_TOP_DPI>;
> + assigned-clock-parents = <&topckgen CLK_TOP_TVDPLL_D2>;
> + interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_LOW 0>;
> + status = "disabled";
> +
> + port {
> + dpi_out: endpoint { };
> + };
> + };
> +
> dsi0: dsi at 14013000 {
> compatible = "mediatek,mt8186-dsi";
> reg = <0 0x14013000 0 0x1000>;
> --
> 2.18.0
>
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