[PATCH v2 17/23] arm64: dts: Update cache properties for realtek

[Andreas Färber]

Hello,

On 12.01.23 09:33, Pierre Gondois wrote:
> Just a reminder in case the patch was forgotten,
[...]
> On 11/7/22 16:57, Pierre Gondois wrote:
>> The DeviceTree Specification v0.3 specifies that the cache node
>> 'compatible' and 'cache-level' properties are 'required'. Cf.
>> s3.8 Multi-level and Shared Cache Nodes
>> The 'cache-unified' property should be present if one of the
>> properties for unified cache is present ('cache-size', ...).
>>
>> Update the Device Trees accordingly.
>>
>> Signed-off-by: Pierre Gondois <pierre.gondois at arm.com>
>> ---
>>   arch/arm64/boot/dts/realtek/rtd1293.dtsi | 1 +
>>   arch/arm64/boot/dts/realtek/rtd1295.dtsi | 1 +
>>   arch/arm64/boot/dts/realtek/rtd1296.dtsi | 1 +
>>   arch/arm64/boot/dts/realtek/rtd1395.dtsi | 1 +
>>   arch/arm64/boot/dts/realtek/rtd16xx.dtsi | 2 ++
>>   5 files changed, 6 insertions(+)

Short-term I can offer an

Acked-by: Andreas Färber <afaerber at suse.de>

Regards,
Andreas

>>
>> diff --git a/arch/arm64/boot/dts/realtek/rtd1293.dtsi 
>> b/arch/arm64/boot/dts/realtek/rtd1293.dtsi
>> index 2d92b56ac94d..0696b99fc40d 100644
>> --- a/arch/arm64/boot/dts/realtek/rtd1293.dtsi
>> +++ b/arch/arm64/boot/dts/realtek/rtd1293.dtsi
>> @@ -30,6 +30,7 @@ cpu1: cpu at 1 {
>>           l2: l2-cache {
>>               compatible = "cache";
>> +            cache-level = <2>;
>>           };
>>       };
>> diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi 
>> b/arch/arm64/boot/dts/realtek/rtd1295.dtsi
>> index 1402abe80ea1..4ca322e420e6 100644
>> --- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi
>> +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi
>> @@ -44,6 +44,7 @@ cpu3: cpu at 3 {
>>           l2: l2-cache {
>>               compatible = "cache";
>> +            cache-level = <2>;
>>           };
>>       };
>> diff --git a/arch/arm64/boot/dts/realtek/rtd1296.dtsi 
>> b/arch/arm64/boot/dts/realtek/rtd1296.dtsi
>> index fb864a139c97..03fccd48f0c0 100644
>> --- a/arch/arm64/boot/dts/realtek/rtd1296.dtsi
>> +++ b/arch/arm64/boot/dts/realtek/rtd1296.dtsi
>> @@ -44,6 +44,7 @@ cpu3: cpu at 3 {
>>           l2: l2-cache {
>>               compatible = "cache";
>> +            cache-level = <2>;
>>           };
>>       };
>> diff --git a/arch/arm64/boot/dts/realtek/rtd1395.dtsi 
>> b/arch/arm64/boot/dts/realtek/rtd1395.dtsi
>> index 05c9216a87ee..94c0a8cf4953 100644
>> --- a/arch/arm64/boot/dts/realtek/rtd1395.dtsi
>> +++ b/arch/arm64/boot/dts/realtek/rtd1395.dtsi
>> @@ -44,6 +44,7 @@ cpu3: cpu at 3 {
>>           l2: l2-cache {
>>               compatible = "cache";
>> +            cache-level = <2>;
>>           };
>>       };
>> diff --git a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi 
>> b/arch/arm64/boot/dts/realtek/rtd16xx.dtsi
>> index afba5f04c8ec..2ee9ba1ecdc1 100644
>> --- a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi
>> +++ b/arch/arm64/boot/dts/realtek/rtd16xx.dtsi
>> @@ -87,12 +87,14 @@ cpu5: cpu at 500 {
>>           l2: l2-cache {
>>               compatible = "cache";
>> +            cache-level = <2>;
>>               next-level-cache = <&l3>;
>>           };
>>           l3: l3-cache {
>>               compatible = "cache";
>> +            cache-level = <3>;
>>           };
>>       };

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