[PATCH] soc: imx: imx8mp-blk-ctrl: set HDMI LCDIF panic read hurry level

[Lucas Stach]

Hi Peng,

Am Dienstag, dem 10.01.2023 um 10:25 +0800 schrieb Peng Fan:
> 
> On 1/10/2023 12:12 AM, Lucas Stach wrote:
> > Same as done for both LCDIF interfaces in the MEDIA domain, set
> > the panic priority of the LCDIF instance in the HDMI domain to
> > the maximium NoC priority of 7 to minimize chances of display
> > underflows.
> > 
> > Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
> > ---
> >   drivers/soc/imx/imx8mp-blk-ctrl.c | 3 +++
> >   1 file changed, 3 insertions(+)
> > 
> > diff --git a/drivers/soc/imx/imx8mp-blk-ctrl.c b/drivers/soc/imx/imx8mp-blk-ctrl.c
> > index 0629f64ef4f1..28458ed1793b 100644
> > --- a/drivers/soc/imx/imx8mp-blk-ctrl.c
> > +++ b/drivers/soc/imx/imx8mp-blk-ctrl.c
> > @@ -300,6 +300,7 @@ static const struct imx8mp_blk_ctrl_data imx8mp_hsio_blk_ctl_dev_data = {
> >   #define HDMI_RTX_CLK_CTL3	0x70
> >   #define HDMI_RTX_CLK_CTL4	0x80
> >   #define HDMI_TX_CONTROL0	0x200
> > +#define  HDMI_LCDIF_NOC_HURRY_MASK		GENMASK(14, 12)
> >   
> >   static void imx8mp_hdmi_blk_ctrl_power_on(struct imx8mp_blk_ctrl *bc,
> >   					  struct imx8mp_blk_ctrl_domain *domain)
> > @@ -316,6 +317,8 @@ static void imx8mp_hdmi_blk_ctrl_power_on(struct imx8mp_blk_ctrl *bc,
> >   		regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(11));
> >   		regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
> >   				BIT(4) | BIT(5) | BIT(6));
> > +		regmap_set_bits(bc->regmap, HDMI_TX_CONTROL0,
> > +				FIELD_PREP(HDMI_LCDIF_NOC_HURRY_MASK, 7));
> >   		break;
> >   	case IMX8MP_HDMIBLK_PD_PAI:
> >   		regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(17));
> 
> For the LCDIF, Reviewed-by: Peng Fan <peng.fan at nxp.com>
> 
> BTW: will you also add HRV hurry level? If not, I could also post a patch.
> 
Sure, I can post a patch for that. However, I would really appreciate
if NXP made some information available on how HRV is actually
working/used. The reference manual is lacking a lot in that regard.

Regards,
Lucas