[RFC PATCH 3/7] dt-bindings: bus: add STM32MP15 ETZPC firewall bus bindings

[Gatien CHEVALLIER]

Hello Krzysztof,

On 12/22/22 14:57, Krzysztof Kozlowski wrote:
> On 22/12/2022 14:51, Gatien CHEVALLIER wrote:
>> Hello,
>>
>> On 12/22/22 11:26, Krzysztof Kozlowski wrote:
>>> On 21/12/2022 18:30, Gatien Chevallier wrote:
>>>> Adds the list of peripherals IDs under firewall bus on STM32MP15.
>>>>
>>>> Signed-off-by: Gatien Chevallier <gatien.chevallier at foss.st.com>
>>>> ---
>>>>    include/dt-bindings/bus/stm32mp15_sys_bus.h | 98 +++++++++++++++++++++
>>>>    1 file changed, 98 insertions(+)
>>>>    create mode 100644 include/dt-bindings/bus/stm32mp15_sys_bus.h
>>>>
>>>> diff --git a/include/dt-bindings/bus/stm32mp15_sys_bus.h b/include/dt-bindings/bus/stm32mp15_sys_bus.h
>>>> new file mode 100644
>>>> index 000000000000..97eacc7b5f16
>>>> --- /dev/null
>>>> +++ b/include/dt-bindings/bus/stm32mp15_sys_bus.h
>>>
>>> That's wrong in multiple ways:
>>> 1. No underscores
>>> 2. Missing vendor prefix
>>> 3. Name not matching compatible.
>>
>> Sure, will comply in V3.
>>
>>>
>>>> @@ -0,0 +1,98 @@
>>>> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
>>>> +/*
>>>> + * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
>>>> + */
>>>> +#ifndef _DT_BINDINGS_BUS_STM32MP15_SYS_BUS_H
>>>> +#define _DT_BINDINGS_BUS_STM32MP15_SYS_BUS_H
>>>> +
>>>> +/* ETZPC IDs */
>>>> +#define STM32MP1_ETZPC_STGENC_ID	0
>>>> +#define STM32MP1_ETZPC_BKPSRAM_ID	1
>>>> +#define STM32MP1_ETZPC_IWDG1_ID		2
>>>> +#define STM32MP1_ETZPC_USART1_ID	3
>>>> +#define STM32MP1_ETZPC_SPI6_ID		4
>>>> +#define STM32MP1_ETZPC_I2C4_ID		5
>>>> +/* ID 6 reserved */
>>>
>>> Reserved why? These are IDs so they start from 0 and go by 0. Don't
>>> hard-code some register offsets.
>>
>> Here, I do define IDs. Some appear as reserved based on what I've seen
>> in the SoC datasheet that states these as "indexes"
>>
>> Please see the table 94 in chapter 15.6 (ETZPC) of the STM32MP157
>> Reference manual:
>> [1] https://www.st.com/resource/en/reference_manual/DM00327659-.pdf
> 
> Then why do you define them in bindings? Use raw numbers. Do you see
> anywhere in arm/arm64 bindings for GIC_SPI interrupt numbers?
> 

What would you think of simply removing the comments that state that IDs 
are reserved, mimicking the way it is for qcom bindings? Fundamentally, 
they are indeed only IDs and could be raw numbers.

IMO, this makes reading the device tree harder. Because you'd have to 
look what the raw number corresponds to.

To take an example, it has already been done for SCMI clocks and I find 
it eases comprehension.

Best regards,
Gatien

> Best regards,
> Krzysztof
>