[PATCH] mmc: sdhci-of-arasan: Add support to request the "gate" clock

[Michal Simek]

On 2/23/23 15:14, Swati Agarwal wrote:
> Add support to read the optional "gate" clock property and request the
> clock which will be used to ungate the DLL clock.
> 
> For Xilinx platforms which has DLL module, dll clock must be
> ungated/enabled when SD controller operates at higher frequencies like 50
> MHz, 100 MHz and 200 MHz. This will be done by explicitly requesting gate
> clock from the driver.
> 
> Signed-off-by: Swati Agarwal <swati.agarwal at amd.com>
> ---
>   drivers/mmc/host/sdhci-of-arasan.c | 7 +++++++
>   1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
> index 4eebbf801b41..1fd7528c14fc 100644
> --- a/drivers/mmc/host/sdhci-of-arasan.c
> +++ b/drivers/mmc/host/sdhci-of-arasan.c
> @@ -1870,6 +1870,7 @@ static int sdhci_arasan_probe(struct platform_device *pdev)
>   	int ret;
>   	struct device_node *node;
>   	struct clk *clk_xin;
> +	struct clk *clk_dll;
>   	struct sdhci_host *host;
>   	struct sdhci_pltfm_host *pltfm_host;
>   	struct device *dev = &pdev->dev;
> @@ -1943,6 +1944,12 @@ static int sdhci_arasan_probe(struct platform_device *pdev)
>   		goto clk_dis_ahb;
>   	}
>   
> +	clk_dll = devm_clk_get_optional_enabled(dev, "gate");
> +	if (IS_ERR(clk_dll)) {
> +		ret = dev_err_probe(dev, PTR_ERR(clk_dll), "failed to get dll clk\n");
> +		goto clk_disable_all;
> +	}
> +
>   	if (of_property_read_bool(np, "xlnx,fails-without-test-cd"))
>   		sdhci_arasan->quirks |= SDHCI_ARASAN_QUIRK_FORCE_CDTEST;
>   

Based on available information, that it is not clear what gate clock really is 
and what it is used for, I think the patch is correct.

Acked-by: Michal Simek <michal.simek at amd.com>

Thanks,
Michal