[PATCH v11 2/8] arm64: dts: ti: k3-j721s2-main: Add SERDES and WIZ device tree node
Ravi Gunasekaran
r-gunasekaran at ti.com
Fri Feb 24 02:24:32 PST 2023
From: Matt Ranostay <mranostay at ti.com>
Add dt node for the single instance of WIZ (SERDES wrapper) and
SERDES module shared by PCIe, eDP and USB.
Signed-off-by: Matt Ranostay <mranostay at ti.com>
Signed-off-by: Ravi Gunasekaran <r-gunasekaran at ti.com>
---
I had reviewed this patch in the v7 series [0].
Since I'm taking over upstreaming this series, I removed the self
Reviewed-by tag.
[0] - https://lore.kernel.org/lkml/4173e0c6-61d9-5b79-44ec-317870de070b@ti.com/
Changes from v10:
* Fixed dtbs warnings by adding "reg" property to the mux-controller nodes
* Documented the reason for disabling the nodes by default
* Removed Link tag from commit message
Changes from v9:
* Disabled serdes related nodes by default in common DT file
Changes from v8:
* No change
Changes from v7:
* Updated mux-controller node name
Changes from v6:
* Fixed the incorrect "compatible" property
Changes from v5:
* Removed Cc tag from commit message
Changes from v4:
* No change
Changes from v3:
* No change
Changes from v2:
* Reworked SERDES + WIZ enablement patchset to use properies for clocks
defines versus entire devicetree nodes. Results in cleaner code that
doesn't break dt-schema or the driver functionality.
Changes from v1:
* Update mux-controller node name
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 69 ++++++++++++++++++++++
11 file changed, 69 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index c6b5ffbcbc73..c9b90ffb4f7c 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -5,6 +5,17 @@
* Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
*/
+#include <dt-bindings/phy/phy-cadence.h>
+#include <dt-bindings/phy/phy-ti.h>
+
+/ {
+ serdes_refclk: clock-cmnrefclk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <0>;
+ };
+};
+
&cbass_main {
msmc_ram: sram at 70000000 {
compatible = "mmio-sram";
@@ -39,6 +50,14 @@
#mux-control-cells = <1>;
mux-reg-masks = <0x0 0x8000000>; /* USB0 to SERDES0 lane 1/3 mux */
};
+
+ serdes_ln_ctrl: mux-controller at 80 {
+ compatible = "mmio-mux";
+ reg = <0x80 0x10>;
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x80 0x3>, <0x84 0x3>, /* SERDES0 lane0/1 select */
+ <0x88 0x3>, <0x8c 0x3>; /* SERDES0 lane2/3 select */
+ };
};
gic500: interrupt-controller at 1800000 {
@@ -802,6 +821,56 @@
};
};
+ serdes_wiz0: wiz at 5060000 {
+ compatible = "ti,j721s2-wiz-10g";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ power-domains = <&k3_pds 365 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 365 0>, <&k3_clks 365 3>, <&serdes_refclk>;
+ clock-names = "fck", "core_ref_clk", "ext_ref_clk";
+ num-lanes = <4>;
+ #reset-cells = <1>;
+ #clock-cells = <1>;
+ ranges = <0x5060000 0x0 0x5060000 0x10000>;
+
+ assigned-clocks = <&k3_clks 365 3>;
+ assigned-clock-parents = <&k3_clks 365 7>;
+
+ /*
+ * Disable the node by default in the common include file.
+ * And enable it in the board specific DT file where the
+ * pinmux property is added.
+ */
+ status = "disabled";
+
+ serdes0: serdes at 5060000 {
+ compatible = "ti,j721e-serdes-10g";
+ reg = <0x05060000 0x00010000>;
+ reg-names = "torrent_phy";
+ resets = <&serdes_wiz0 0>;
+ reset-names = "torrent_reset";
+ clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>,
+ <&serdes_wiz0 TI_WIZ_PHY_EN_REFCLK>;
+ clock-names = "refclk", "phy_en_refclk";
+ assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>,
+ <&serdes_wiz0 TI_WIZ_PLL1_REFCLK>,
+ <&serdes_wiz0 TI_WIZ_REFCLK_DIG>;
+ assigned-clock-parents = <&k3_clks 365 3>,
+ <&k3_clks 365 3>,
+ <&k3_clks 365 3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #clock-cells = <1>;
+
+ /*
+ * Disable the node by default in the common include
+ * file. And enable it in the board specific DT file
+ * where the pinmux property is added.
+ */
+ status = "disabled";
+ };
+ };
+
main_mcan0: can at 2701000 {
compatible = "bosch,m_can";
reg = <0x00 0x02701000 0x00 0x200>,
--
2.17.1
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