[PATCH 2/2] mips: dts: ralink: mt7621: add port at 5 as CPU port

[Thomas Bogendoerfer]

On Sat, Feb 11, 2023 at 01:49:15PM +0300, arinc9.unal at gmail.com wrote:
> From: Arınç ÜNAL <arinc.unal at arinc9.com>
> 
> On MT7621AT, MT7621DAT, and MT7621ST SoCs, port 5 of the MT7530 switch is
> connected to the second MAC of the SoC as a CPU port. Add the port and set
> up the second MAC on the bindings. Revert PHY muxing on GB-PC1.
> 
> There's an external PHY connected to the second MAC of the SoC on GB-PC2,
> therefore, disable port at 5 for this device.
> 
> Signed-off-by: Arınç ÜNAL <arinc.unal at arinc9.com>
> ---
>  .../boot/dts/ralink/mt7621-gnubee-gb-pc1.dts  | 16 +++++-----------
>  .../boot/dts/ralink/mt7621-gnubee-gb-pc2.dts  |  9 ++++++++-
>  arch/mips/boot/dts/ralink/mt7621.dtsi         | 19 ++++++++++++++++++-
>  3 files changed, 31 insertions(+), 13 deletions(-)

applied to mips-next.

Thomas.

-- 
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good idea.                                                [ RFC1925, 2.3 ]