[PATCH V3 2/5] arm64: dts: qcom: Add support for Crashdump collection on IPQ9574

[POOVENDHAN SELVARAJ]

On 2/8/2023 1:29 PM, Krzysztof Kozlowski wrote:
> On 08/02/2023 06:33, Poovendhan Selvaraj wrote:
>> Enable Crashdump collection in ipq9574
>>
>> Co-developed-by: Anusha Rao <quic_anusha at quicinc.com>
>> Signed-off-by: Anusha Rao <quic_anusha at quicinc.com>
>> Co-developed-by: Kathiravan Thirumoorthy <quic_kathirav at quicinc.com>
>> Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav at quicinc.com>
>> Signed-off-by: Poovendhan Selvaraj <quic_poovendh at quicinc.com>
>> ---
>>   Changes in V3:
>> 	- No changes
>>   arch/arm64/boot/dts/qcom/ipq9574.dtsi | 26 +++++++++++++++++++++++++-
>>   1 file changed, 25 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> index 2b86ba17bb32..9c4523f50a57 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> @@ -81,6 +81,13 @@
>>   		reg = <0x0 0x40000000 0x0 0x0>;
>>   	};
>>   
>> +	firmware {
>> +		scm {
>> +			compatible = "qcom,scm-ipq9574", "qcom,scm";
>> +			qcom,dload-mode = <&tcsr_boot_misc 0>;
>> +		};
>> +	};
>> +
>>   	pmu {
>>   		compatible = "arm,cortex-a73-pmu";
>>   		interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>> @@ -95,11 +102,17 @@
>>   		#address-cells = <2>;
>>   		#size-cells = <2>;
>>   		ranges;
>> -
> I don't think anything improved here - still unrelated change.
>
>
> Best regards,
> Krzysztof

Okay sure...next series will add required smem and download mode nodes 
in different patches.

Regards,
Poovendhan S