Question on "arm64: mm: Prototype to allow drivers to request PBHA values"

[mawupeng]

On 2023/2/4 2:00, James Morse wrote:
> Hi mawupeng,
> 
> On 03/02/2023 08:30, mawupeng wrote:
>> Thanks for your work on working out what linux needs to support to make use of
>> existing SoCs using PBHA[1]. In your example, PBHA can be use memory
>> compression or system-cache.
> 
>> This patch set is perfect and covers a wide range of scenarios. What's you
>> follow-up plan for this patch set?
> 
> I was hoping we could collect together what PBHA is being used for in existing SoCs, to
> work out which of those things we can support in mainline.
> 
> Marc Z had some additional questions on IO and DMA.
> 
> 
>> In this patch set, devicetree is using to pass the pbha-performance-only
>> and pbha-no-aliases attributes to the OS. Since ACPI may be used to do
>> such work and there is no suitable acpi table to represent these
>> attributes at early acpi parse stage.
>>
>> Do you have any idea on how to pass these pbha related attributes via
>> ACPI?
> 
> The DT binding exists to tell the OS which PBHA values only affect performance, and which
> ones mean the page can only be mapped once.
> 
> There is no standard ACPI method that conveys this. I guess the ACPI people would specify
> a GUID for each property, then return a Package() of values from something like a _DSM on
> _SB. (...if that is allowed...).
> 
> But! Without more of a story about what PBHA is used for, including IO and DMA - as well
> as upstream drivers that use it, I think any ACPI support will be premature.
> 
> 
> Can you share what your SoC uses PBHA for, what drivers need to use it. What happens if
> its not supported? (is this a 0.1% performance change, or 10%?). What happens if devices
> access those memory locations? (do they need configuring with PBHA bits too?)

Thanks for your reply.

We want to make a cache used by user tasks in OS(not dirvers), addition PTE
flag for kernel page table shoule be introduced in pte. Since there are no
avilable bit free in pte and PBHA can be used for such work.

We have already disscussed with the hardware them, cache consistency is
ensured by hardware. So there maybe no problem with IO and DMA in this
scenario.

This is just some very early work, but we need to mark sure can be used
in the latest OS.

Thanks, 

Ma Wupeng.

> 
> 
> 
> Thanks,
> 
> James
>