[PATCH 1/1] dt-bindings: iio: adc: add missing vref-supply

[Alexander Stein]

Hi Marco,

Am Samstag, 4. Februar 2023, 01:13:33 CET schrieb Marco Felsch:
> HI Alexander,
> 
> On 23-02-03, Alexander Stein wrote:
> > Am Freitag, 3. Februar 2023, 15:12:17 CET schrieb Marco Felsch:
> > > Hi,
> > > 
> > > On 23-02-03, Alexander Stein wrote:
> > > 
> > > ...
> > > 
> > > > > > > > > +  vref-supply:
> > > > > > > > > +    description: External ADC reference voltage supply on
> > > > > > > > > VREFH
> > > > > > > > > pad.
> > > > > > > > 
> > > > > > > > Please add it to the list of required properties, we can
> > > > > > > > remove it
> > > > > > > > as
> > > > > > > > soon as the driver has support for the internal reference
> > > > > > > > voltages.
> > > > > > > 
> > > > > > > I was thinking in doing so before as well. But DT describes the
> > > > > > > hardware, and this ADC apparently would be functioning without a
> > > > > > > reference voltage on that pad, using a different one. What the
> > > > > > > driver
> > > > > > > actual does is a different matter.>
> > > > > > 
> > > > > > I have also thought about it first but than I checked the RM which
> > > > > > says
> > > > > > that "multi-reference selection" is chip dependent.
> > > > 
> > > > Nice for pointing this out. I wasn't aware that there are differences.
> > > > 
> > > > > Oh goody. So is it detectable?
> > > > 
> > > > That's my problem. I didn't find any source of information which chips
> > > > do
> > > > support multiple references and which don't.
> > > > Marco, do you have some information on this?
> > > 
> > > You can download the RM from the NXP website but you need an account for
> > > it:
> > > https://www.nxp.com/products/processors-and-microcontrollers/arm-process
> > > ors/
> > > i-mx-applications-processors/i-mx-8-applications-processors/i-mx-8-fami
> > > ly-ar
> > > m-cortex-a53-cortex-a72-virtualization-vision-3d-graphics-4k-video:i.MX
> > > 8
> > > 
> > > Or is this the wrong model? The naming scheme is quite confusing to me.
> > 
> > That's i.MX8 (imx8qm), the bindings are for i.MX8X (imx8qxp/imx8dxp). But
> > I
> > assume the ADC is similar/identical.
> > 
> > > > > If we are going to stick to a single compatible rather than adding
> > > > > them
> > > > > for
> > > > > the variants with and without this feature, should probably add a
> > > > > note
> > > > > at
> > > > > least to say it is required for some parts.
> > > > 
> > > > That's a good idea. I'm okay with that, until there is more
> > > > information
> > > > available.
> > > 
> > > According the RM there is a bit which can be read: Multi Vref
> > > Implemented (MVI).
> > 
> > Ah, nice. So there is a hardware feature. From the RM I have available it
> > is set for both imx8qm and imx8qxp. Given that I will not mark this as
> > required, but add a comment regarding this feature bit.
> 
> Can you check the comments about the refsel please? Since this is the
> important part.  Since the RM above states that this bit will indicate a
> multiref device but it can also the case that, you have a chip with just
> on ref selection option (external). I can't check this since I don't
> have the RM for this. @NXP can you give us more information please?

I would assume if MVI is 0 REFSEL should be considered reserved.
Both imx8qm and imx8qxp have MVI set, even imx1170 has this bit set. So I am 
not aware of any SoC with MVI not being set.

Best regards,
Alexander