[PATCH v5 2/2] mmc: add new sdhci reset sequence for brcm 74165b0

[Kamal Dasu]

> On Dec 19, 2023, at 4:55 PM, Florian Fainelli <florian.fainelli at broadcom.com> wrote:
> 
> Hi Kamal,
> 
>> On 12/19/2023 5:22 PM, Kamal Dasu wrote:
>> From: Kamal Dasu <kdasu at broadcom.com>
>> 74165b0 shall use a new sdio controller core version which
>> requires a different reset sequence. For core reset we use
>> sdhci_reset. For CMD and/or DATA reset added a new function
>> to also enable SDHCI clocks SDHCI_CLOCK_CARD_EN
>> SDHCI_CLOCK_INT_EN along with the SDHCI_RESET_CMD and/or
>> SDHCI_RESET_DATA fields.
>> Signed-off-by: Kamal Dasu <kdasu at broadcom.com>
>> ---
> 
> [snip]
> 
>> +static void brcmstb_sdhci_reset_cmd_data(struct sdhci_host *host, u8 mask)
>> +{
>> +    int ret;
>> +    u32 reg;
>> +    u32 new_mask = (mask &  (SDHCI_RESET_CMD | SDHCI_RESET_DATA)) << 24;
>> +
>> +    /*
>> +     * SDHCI_CLOCK_CONTROL register CARD_EN and CLOCK_INT_EN bits shall
>> +     * be set along with SOFTWARE_RESET register RESET_CMD or RESET_DATA
>> +     * bits, hence access SDHCI_CLOCK_CONTROL register as 32-bit register
>> +     */
>> +    new_mask |= SDHCI_CLOCK_CARD_EN | SDHCI_CLOCK_INT_EN;
>> +    reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL);
>> +    sdhci_writel(host, reg | new_mask, SDHCI_CLOCK_CONTROL);
>> +
>> +    reg = sdhci_readb(host, SDHCI_SOFTWARE_RESET);
>> +    ret = readb_poll_timeout(host->ioaddr + SDHCI_SOFTWARE_RESET,
>> +                 reg, reg & mask, 10, 10000);
> 
> Does this need to be readb_poll_timeout_atomic() since this function can be used in both atomic and non-atomic context AFAIR?

Yes it does. Will send a v6
> --
> Florian

Kamal
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