[PATCH v2 4/5] dt-bindings/perf: Add Arm CoreSight PMU

[Krzysztof Kozlowski]

On 14/12/2023 17:31, Robin Murphy wrote:
> +
> +  reg:
> +    items:
> +      - description: Register page 0
> +      - description: Register page 1, if the PMU implements the dual-page extension
> +    minItems: 1
> +
> +  interrupts:
> +    items:
> +      - description: Overflow interrupt
> +
> +  cpus:
> +    description: If the PMU is associated with a particular CPU or subset of CPUs, array of phandles to those CPUs
> +
> +  reg-io-width:
> +    description: Granularity at which PMU register accesses are single-copy atomic
> +    default: 4
> +    enum: [4, 8]
> +
> +

If there is going to be new posting: just one blank line

> +required:
> +  - compatible
> +  - reg
> +
> +additionalProperties: false

Why no example to validate the binding?

Best regards,
Krzysztof