[PATCH v7 12/16] watchdog: s3c2410_wdt: Add support for Google gs101 SoC

[Alim Akhtar]

> -----Original Message-----
> From: Peter Griffin <peter.griffin at linaro.org>
> Sent: Monday, December 11, 2023 9:53 PM
> To: robh+dt at kernel.org; krzysztof.kozlowski+dt at linaro.org;
> mturquette at baylibre.com; conor+dt at kernel.org; sboyd at kernel.org;
> tomasz.figa at gmail.com; s.nawrocki at samsung.com; linus.walleij at linaro.org;
> wim at linux-watchdog.org; linux at roeck-us.net; catalin.marinas at arm.com;
> will at kernel.org; arnd at arndb.de; olof at lixom.net;
> gregkh at linuxfoundation.org; jirislaby at kernel.org;
> cw00.choi at samsung.com; alim.akhtar at samsung.com
> Cc: peter.griffin at linaro.org; tudor.ambarus at linaro.org;
> andre.draszik at linaro.org; semen.protsenko at linaro.org;
> saravanak at google.com; willmcvicker at google.com; soc at kernel.org;
> devicetree at vger.kernel.org; linux-arm-kernel at lists.infradead.org; linux-
> samsung-soc at vger.kernel.org; linux-clk at vger.kernel.org; linux-
> gpio at vger.kernel.org; linux-watchdog at vger.kernel.org; kernel-
> team at android.com; linux-serial at vger.kernel.org
> Subject: [PATCH v7 12/16] watchdog: s3c2410_wdt: Add support for Google
> gs101 SoC
> 
> This patch adds the compatibles and drvdata for the Google
> gs101 SoC found in Pixel 6, Pixel 6a & Pixel 6 pro phones.
> 
> Similar to Exynos850 it has two watchdog instances, one for each cluster
and
> has some control bits in PMU registers.
> 
> gs101 also has the dbgack_mask bit in wtcon register, so we also enable
> QUIRK_HAS_DBGACK_BIT.
> 
> Tested-by: Will McVicker <willmcvicker at google.com>
> Reviewed-by: Sam Protsenko <semen.protsenko at linaro.org>
> Signed-off-by: Peter Griffin <peter.griffin at linaro.org>
> ---
>  drivers/watchdog/s3c2410_wdt.c | 49
> ++++++++++++++++++++++++++++++----
>  1 file changed, 44 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/watchdog/s3c2410_wdt.c
> b/drivers/watchdog/s3c2410_wdt.c index b7a03668f743..c3046610ab5d
> 100644
> --- a/drivers/watchdog/s3c2410_wdt.c
> +++ b/drivers/watchdog/s3c2410_wdt.c
> @@ -69,6 +69,13 @@
>  #define EXYNOSAUTOV9_CLUSTER0_WDTRESET_BIT	25
>  #define EXYNOSAUTOV9_CLUSTER1_WDTRESET_BIT	24
> 
> 
[snip]
>  static const struct of_device_id s3c2410_wdt_match[] = {
> +	{ .compatible = "google,gs101-wdt",
> +	  .data = &drv_data_gs101_cl0 },
>  	{ .compatible = "samsung,s3c2410-wdt",
>  	  .data = &drv_data_s3c2410 },
>  	{ .compatible = "samsung,s3c6410-wdt", @@ -605,9 +640,10 @@
> s3c2410_get_wdt_drv_data(struct platform_device *pdev, struct
> s3c2410_wdt *wdt)
>  	}
> 
>  #ifdef CONFIG_OF
> -	/* Choose Exynos850/ExynosAutov9 driver data w.r.t. cluster index
> */
> +	/* Choose Exynos9 SoC family driver data w.r.t. cluster index */
Exynos9 introduction is out of context here, so you can leave it as original
comment, it is not adding anything here.

>  	if (variant == &drv_data_exynos850_cl0 ||
> -	    variant == &drv_data_exynosautov9_cl0) {
> +	    variant == &drv_data_exynosautov9_cl0 ||
> +	    variant == &drv_data_gs101_cl0) {
>  		u32 index;
[snip]
> --
> 2.43.0.472.g3155946c3a-goog