[PATCH v2 02/12] KVM: arm64: Add latest HFGxTR_EL2 FGT entries to nested virt

[Fuad Tabba]

Hi Mark,

On Thu, Dec 7, 2023 at 5:06 PM Mark Brown <broonie at kernel.org> wrote:
>
> On Wed, Dec 06, 2023 at 10:04:52AM +0000, Fuad Tabba wrote:
>
> > +#define SYS_GCSCR_EL1                        sys_reg(3, 0, 2, 5, 0)
> > +#define SYS_GCSPR_EL1                        sys_reg(3, 0, 2, 5, 1)
> > +#define SYS_GCSCRE0_EL1                      sys_reg(3, 0, 2, 5, 2)
> > +
>
> > +#define SYS_GCSPR_EL0                        sys_reg(3, 3, 2, 5, 1)
> > +
>
> Unless there's some complication with representing them (mainly register
> layouts that aren't representable with the language or *very* repetitive
> blocks of registers) we should be adding any new sysregs to the sysreg
> file rather than manually encoding them.  We're trying to move things
> out of sysreg.h as much as possible.

I thought that we're still using the encoded ones if we're not using
the fields of the registers. That said, I'll move to the generated one
in the respin.

>
> For the above you can pick up the patch from my GCS series:
>
>   https://lore.kernel.org/linux-arm-kernel/20231122-arm64-gcs-v7-6-201c483bd775@kernel.org/
>
> > @@ -412,6 +423,8 @@
> >  #define SYS_PMUSERENR_EL0            sys_reg(3, 3, 9, 14, 0)
> >  #define SYS_PMOVSSET_EL0             sys_reg(3, 3, 9, 14, 3)
> >
> > +#define SYS_POR_EL0                  sys_reg(3, 3, 10, 2, 4)
> > +
>
> This is in Joey's POR series:
>
>   https://lore.kernel.org/linux-arm-kernel/20231124163510.1835740-2-joey.gouly@arm.com/
>
> Unfortunately I'm not aware of anyone having already done the rest.

I'll pick up what you and Joey have done and add the rest.

Thanks,
/fuad