[PATCH V15 1/8] arm64/sysreg: Add BRBE registers and fields

Anshuman Khandual anshuman.khandual at arm.com
Sun Dec 3 20:03:56 PST 2023



On 12/1/23 22:28, Mark Brown wrote:
> On Fri, Dec 01, 2023 at 11:08:59AM +0530, Anshuman Khandual wrote:
> 
> This looks good apart from a few small omissions:
> 
>> +SysregFields BRBINFx_EL1
> 
>> +Enum	13:8		TYPE
>> +	0b000000	UNCOND_DIRECT
>> +	0b000001	INDIRECT
>> +	0b000010	DIRECT_LINK
>> +	0b000011	INDIRECT_LINK
>> +	0b000101	RET
>> +	0b000111	ERET
>> +	0b001000	COND_DIRECT
>> +	0b100001	DEBUG_HALT
>> +	0b100010	CALL
>> +	0b100011	TRAP
>> +	0b100100	SERROR
>> +	0b100110	INSN_DEBUG
>> +	0b100111	DATA_DEBUG
>> +	0b101010	ALIGN_FAULT
>> +	0b101011	INSN_FAULT
>> +	0b101100	DATA_FAULT
>> +	0b101110	IRQ
>> +	0b101111	FIQ
>> +	0b111001	DEBUG_EXIT
>> +EndEnum
> 
> DDI0601 2023-09 also defines 0b110000 as an IMPLEMENTATION DEFINED
> exception to EL3.

Should this field be just IMPDEF or IMPDEF_TRAP_EL3 sounds better ?

> 
>> +SysregFields	BRBCR_ELx
>> +Res0	63:24
>> +Field	23 	EXCEPTION
>> +Field	22 	ERTN
>> +Res0	21:9
> 
> DDI0601 2023-09 defines bit 9 as FZPSS.

Sure, will update.

> 
>> +Sysreg	BRBINFINJ_EL1	2	1	9	1	0
> 
>> +Enum	13:8		TYPE
>> +	0b000000	UNCOND_DIRECT
>> +	0b000001	INDIRECT
>> +	0b000010	DIRECT_LINK
>> +	0b000011	INDIRECT_LINK
>> +	0b000101	RET
>> +	0b000111	ERET
>> +	0b001000	COND_DIRECT
>> +	0b100001	DEBUG_HALT
>> +	0b100010	CALL
>> +	0b100011	TRAP
>> +	0b100100	SERROR
>> +	0b100110	INSN_DEBUG
>> +	0b100111	DATA_DEBUG
>> +	0b101010	ALIGN_FAULT
>> +	0b101011	INSN_FAULT
>> +	0b101100	DATA_FAULT
>> +	0b101110	IRQ
>> +	0b101111	FIQ
>> +	0b111001	DEBUG_EXIT
>> +EndEnum
> 
> DDI0601 2023-09 also defines 0b11000 as IMPLEMENTATION DEFINED exception
> to EL3.

Should this field be just IMPDEF or IMPDEF_TRAP_EL3 sounds better ?

Seems like BRBINFx_EL1 could be used for defining BRBINFINJ_EL1 as well.



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