[PATCH 3/4] arm64: dts: imx8mp: Switch WiFI enable signal to mmc-pwrseq-simple on i.MX8MP DHCOM SoM
Marek Vasut
marex at denx.de
Thu Aug 31 11:20:19 PDT 2023
The reset-gpio is connected to WL_REG_EN signal of the WiFi MAC, the
mmc-pwrseq-simple driver is better suited to operate this signal as
it is tied to the slot instead of the MAC, and it can enable the MAC
before the brcmfmac driver binds to it. Make use of the MMC power
sequencer.
Signed-off-by: Marek Vasut <marex at denx.de>
---
Cc: Conor Dooley <conor+dt at kernel.org>
Cc: Fabio Estevam <festevam at gmail.com>
Cc: Frieder Schrempf <frieder.schrempf at kontron.de>
Cc: Geert Uytterhoeven <geert+renesas at glider.be>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt at linaro.org>
Cc: Magnus Damm <magnus.damm at gmail.com>
Cc: Marek Vasut <marex at denx.de>
Cc: NXP Linux Team <linux-imx at nxp.com>
Cc: Peng Fan <peng.fan at nxp.com>
Cc: Pengutronix Kernel Team <kernel at pengutronix.de>
Cc: Rob Herring <robh+dt at kernel.org>
Cc: Sascha Hauer <s.hauer at pengutronix.de>
Cc: Shawn Guo <shawnguo at kernel.org>
Cc: devicetree at vger.kernel.org
Cc: linux-arm-kernel at lists.infradead.org
---
arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
index 1644b56c3953d..df43741d04bb9 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
@@ -57,6 +57,11 @@ reg_vdd_3p3v_awo: regulator-vdd-3p3v-awo { /* VDD_3V3_AWO */
regulator-max-microvolt = <3300000>;
regulator-name = "VDD_3P3V_AWO";
};
+
+ wlan_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
+ };
};
&A53_0 {
@@ -543,6 +548,7 @@ &usdhc1 {
pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+ mmc-pwrseq = <&wlan_pwrseq>;
vmmc-supply = <&buck4>;
bus-width = <4>;
non-removable;
@@ -561,7 +567,6 @@ brcmf: bcrmf at 1 { /* muRata 2AE */
* connected to the SoC, but can be connected on to
* SoC pin on the carrier board.
*/
- reset-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
};
};
--
2.40.1
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