[PATCH 3/6] dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions

[Devi Priya]

On 8/24/2023 2:17 PM, Konrad Dybcio wrote:
> On 24.08.2023 07:18, Kathiravan T wrote:
>>
>> On 7/11/2023 3:05 PM, Devi Priya wrote:
>>> Add NSSCC clock and reset definitions for ipq9574.
>>>
>>> Signed-off-by: Devi Priya <quic_devipriy at quicinc.com>
>>> ---
>>>    .../bindings/clock/qcom,ipq9574-nsscc.yaml    |  76 +++++++++
>>>    .../dt-bindings/clock/qcom,ipq9574-nsscc.h    | 152 ++++++++++++++++++
>>>    .../dt-bindings/reset/qcom,ipq9574-nsscc.h    | 134 +++++++++++++++
>>>    3 files changed, 362 insertions(+)
>>>    create mode 100644 Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml
>>>    create mode 100644 include/dt-bindings/clock/qcom,ipq9574-nsscc.h
>>>    create mode 100644 include/dt-bindings/reset/qcom,ipq9574-nsscc.h
>>>
>>> diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml
>>> new file mode 100644
>>> index 000000000000..1e8754760785
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml
>>> @@ -0,0 +1,76 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/clock/qcom,ipq9574-nsscc.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: Qualcomm Networking Sub System Clock & Reset Controller on IPQ9574
>>> +
>>> +maintainers:
>>> +  - Bjorn Andersson <andersson at kernel.org>
>>> +  - Anusha Rao <quic_anusha at quicinc.com>
>>> +
>>> +description: |
>>> +  Qualcomm networking sub system clock control module provides the clocks,
>>> +  resets and power domains on IPQ9574
>>> +
>>> +  See also::
>>> +    include/dt-bindings/clock/qcom,ipq9574-nsscc.h
>>> +    include/dt-bindings/reset/qcom,ipq9574-nsscc.h
>>> +
>>> +properties:
>>> +  compatible:
>>> +    const: qcom,ipq9574-nsscc
>>> +
>>> +  clocks:
>>> +    items:
>>> +      - description: Bias PLL cc clock source
>>> +      - description: Bias PLL nss noc clock source
>>> +      - description: Bias PLL ubi nc clock source
>>> +      - description: GCC GPLL0 out aux clock source
>>> +      - description: Uniphy0 GCC Rx clock source
>>> +      - description: Uniphy0 GCC Tx clock source
>>> +      - description: Uniphy1 GCC Rx clock source
>>> +      - description: Uniphy1 GCC Tx clock source
>>> +      - description: Uniphy2 GCC Rx clock source
>>> +      - description: Uniphy2 GCC Tx clock source
>>
>>
>> These are UniphyX *NSS* TX/RX clock source?
> Wouldn't that be "source from GCC"?
These clocks are not sourced from GCC

Thanks,
Devi Priya
> 
> Konrad