[PATCH V4 2/3] coresight: etm: Make cycle count threshold user configurable

[Suzuki K Poulose]

On 18/08/2023 14:01, Mike Leach wrote:
> On Fri, 18 Aug 2023 at 12:25, Suzuki K Poulose <suzuki.poulose at arm.com> wrote:
>>
>> On 18/08/2023 12:20, Anshuman Khandual wrote:
>>> Cycle counting is enabled, when requested and supported but with a default
>>> threshold value ETM_CYC_THRESHOLD_DEFAULT i.e 0x100 getting into TRCCCCTLR,
>>> representing the minimum interval between cycle count trace packets.
>>>
>>> This makes cycle threshold user configurable, from the user space via perf
>>> event attributes. Although it falls back using ETM_CYC_THRESHOLD_DEFAULT,
>>> in case no explicit request. As expected it creates a sysfs file as well.
>>>
>>> /sys/bus/event_source/devices/cs_etm/format/cc_threshold
>>>
>>> New 'cc_threshold' uses 'event->attr.config3' as no more space is available
>>> in 'event->attr.config1' or 'event->attr.config2'.
>>>
>>> Cc: Suzuki K Poulose <suzuki.poulose at arm.com>
>>> Cc: Mike Leach <mike.leach at linaro.org>
>>> Cc: James Clark <james.clark at arm.com>
>>> Cc: Leo Yan <leo.yan at linaro.org>
>>> Cc: coresight at lists.linaro.org
>>> Cc: linux-arm-kernel at lists.infradead.org
>>> Cc: linux-doc at vger.kernel.org
>>> Cc: linux-kernel at vger.kernel.org
>>> Reviewed-by: Mike Leach <mike.leach at linaro.org>
>>> Signed-off-by: Anshuman Khandual <anshuman.khandual at arm.com>
>>> ---
>>>    drivers/hwtracing/coresight/coresight-etm-perf.c   |  2 ++
>>>    drivers/hwtracing/coresight/coresight-etm4x-core.c | 12 ++++++++++--
>>>    2 files changed, 12 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
>>> index 5ca6278baff4..09f75dffae60 100644
>>> --- a/drivers/hwtracing/coresight/coresight-etm-perf.c
>>> +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
>>> @@ -68,6 +68,7 @@ PMU_FORMAT_ATTR(preset,             "config:0-3");
>>>    PMU_FORMAT_ATTR(sinkid,             "config2:0-31");
>>>    /* config ID - set if a system configuration is selected */
>>>    PMU_FORMAT_ATTR(configid,   "config2:32-63");
>>> +PMU_FORMAT_ATTR(cc_threshold,        "config3:0-11");
>>>
>>>
>>>    /*
>>> @@ -101,6 +102,7 @@ static struct attribute *etm_config_formats_attr[] = {
>>>        &format_attr_preset.attr,
>>>        &format_attr_configid.attr,
>>>        &format_attr_branch_broadcast.attr,
>>> +     &format_attr_cc_threshold.attr,
>>>        NULL,
>>>    };
>>>
>>> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
>>> index 591fab73ee79..3193dafa7618 100644
>>> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
>>> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
>>> @@ -635,7 +635,7 @@ static int etm4_parse_event_config(struct coresight_device *csdev,
>>>        struct etmv4_config *config = &drvdata->config;
>>>        struct perf_event_attr *attr = &event->attr;
>>>        unsigned long cfg_hash;
>>> -     int preset;
>>> +     int preset, cc_threshold;
>>>
>>>        /* Clear configuration from previous run */
>>>        memset(config, 0, sizeof(struct etmv4_config));
>>> @@ -658,7 +658,15 @@ static int etm4_parse_event_config(struct coresight_device *csdev,
>>>        if (attr->config & BIT(ETM_OPT_CYCACC)) {
>>>                config->cfg |= TRCCONFIGR_CCI;
>>>                /* TRM: Must program this for cycacc to work */
>>> -             config->ccctlr = ETM_CYC_THRESHOLD_DEFAULT;
>>> +             cc_threshold = attr->config3 & ETM_CYC_THRESHOLD_MASK;
>>> +             if (cc_threshold) {
>>> +                     if (cc_threshold < drvdata->ccitmin)
>>> +                             config->ccctlr = drvdata->ccitmin;
>>> +                     else
>>> +                             config->ccctlr = cc_threshold;
>>> +             } else {
>>> +                     config->ccctlr = ETM_CYC_THRESHOLD_DEFAULT;
>>
>> Ideally this must be the ccitmin ? Theoretically, default value could be
>> bigger than the minimum value supported by the implementation (i.e.,
>> ccitmin)
>>
>> Suzuki
>>
> 
> In order not to change existing behaviour unexpectedly this could be
> re-ordered...
> 
> cc_threshold = attr->config3 & ETM_CYC_THRESHOLD_MASK;
> if (!cc_threshold)
>           cc_threshold = ETM_CYC_THRESHOLD_DEFAULT;
> if (cc_threshold < drvdata->ccitmin)
>           cc_threshold = drvdata->ccitmin
> config->ccctlr = cc_threshold;

That sounds better, Thanks Mike

Suzuki

> 
> Mike
>>> +             }
>>>        }
>>>        if (attr->config & BIT(ETM_OPT_TS)) {
>>>                /*
>>
> 
>