[PATCH v5 0/3] Increase ecam size value to discover 256 buses during
Thippeswamy Havalige
thippeswamy.havalige at amd.com
Thu Aug 17 05:10:41 PDT 2023
Current driver is supports up to 16 buses. The following code fixes
to support up to 256 buses.
update "NWL_ECAM_VALUE_DEFAULT " to 16 can access up to 256MB ECAM
region to detect 256 buses.
Update ecam size to 256MB in device tree binding example.
Thippeswamy Havalige (3):
dt-bindings: PCI: xilinx-nwl: Modify ECAM size in example
PCI: xilinx-nwl: Rename ECAM size default macro
PCI: xilinx-nwl: Increase ECAM size to accommodate 256 buses
Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml | 2 +-
drivers/pci/controller/pcie-xilinx-nwl.c | 6 ++----
2 files changed, 3 insertions(+), 5 deletions(-)
--
2.25.1
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