[PATCH v4 20/28] KVM: arm64: nv: Add trap forwarding for HFGxTR_EL2
Jing Zhang
jingzhangos at google.com
Tue Aug 15 15:51:29 PDT 2023
Hi Marc,
On Tue, Aug 15, 2023 at 11:47 AM Marc Zyngier <maz at kernel.org> wrote:
>
> Implement the trap forwarding for traps described by HFGxTR_EL2,
> reusing the Fine Grained Traps infrastructure previously implemented.
>
> Reviewed-by: Eric Auger <eric.auger at redhat.com>
> Signed-off-by: Marc Zyngier <maz at kernel.org>
> ---
> arch/arm64/kvm/emulate-nested.c | 71 +++++++++++++++++++++++++++++++++
> 1 file changed, 71 insertions(+)
>
> diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c
> index 0da9d92ed921..0e34797515b6 100644
> --- a/arch/arm64/kvm/emulate-nested.c
> +++ b/arch/arm64/kvm/emulate-nested.c
> @@ -938,6 +938,7 @@ static DEFINE_XARRAY(sr_forward_xa);
>
> enum fgt_group_id {
> __NO_FGT_GROUP__,
> + HFGxTR_GROUP,
>
> /* Must be last */
> __NR_FGT_GROUP_IDS__
> @@ -956,6 +957,69 @@ enum fgt_group_id {
> }
>
> static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = {
> + /* HFGRTR_EL2, HFGWTR_EL2 */
> + SR_FGT(SYS_TPIDR2_EL0, HFGxTR, nTPIDR2_EL0, 0),
> + SR_FGT(SYS_SMPRI_EL1, HFGxTR, nSMPRI_EL1, 0),
> + SR_FGT(SYS_ACCDATA_EL1, HFGxTR, nACCDATA_EL1, 0),
> + SR_FGT(SYS_ERXADDR_EL1, HFGxTR, ERXADDR_EL1, 1),
> + SR_FGT(SYS_ERXPFGCDN_EL1, HFGxTR, ERXPFGCDN_EL1, 1),
> + SR_FGT(SYS_ERXPFGCTL_EL1, HFGxTR, ERXPFGCTL_EL1, 1),
> + SR_FGT(SYS_ERXPFGF_EL1, HFGxTR, ERXPFGF_EL1, 1),
> + SR_FGT(SYS_ERXMISC0_EL1, HFGxTR, ERXMISCn_EL1, 1),
> + SR_FGT(SYS_ERXMISC1_EL1, HFGxTR, ERXMISCn_EL1, 1),
> + SR_FGT(SYS_ERXMISC2_EL1, HFGxTR, ERXMISCn_EL1, 1),
> + SR_FGT(SYS_ERXMISC3_EL1, HFGxTR, ERXMISCn_EL1, 1),
> + SR_FGT(SYS_ERXSTATUS_EL1, HFGxTR, ERXSTATUS_EL1, 1),
> + SR_FGT(SYS_ERXCTLR_EL1, HFGxTR, ERXCTLR_EL1, 1),
> + SR_FGT(SYS_ERXFR_EL1, HFGxTR, ERXFR_EL1, 1),
> + SR_FGT(SYS_ERRSELR_EL1, HFGxTR, ERRSELR_EL1, 1),
> + SR_FGT(SYS_ERRIDR_EL1, HFGxTR, ERRIDR_EL1, 1),
> + SR_FGT(SYS_ICC_IGRPEN0_EL1, HFGxTR, ICC_IGRPENn_EL1, 1),
> + SR_FGT(SYS_ICC_IGRPEN1_EL1, HFGxTR, ICC_IGRPENn_EL1, 1),
> + SR_FGT(SYS_VBAR_EL1, HFGxTR, VBAR_EL1, 1),
> + SR_FGT(SYS_TTBR1_EL1, HFGxTR, TTBR1_EL1, 1),
> + SR_FGT(SYS_TTBR0_EL1, HFGxTR, TTBR0_EL1, 1),
> + SR_FGT(SYS_TPIDR_EL0, HFGxTR, TPIDR_EL0, 1),
> + SR_FGT(SYS_TPIDRRO_EL0, HFGxTR, TPIDRRO_EL0, 1),
> + SR_FGT(SYS_TPIDR_EL1, HFGxTR, TPIDR_EL1, 1),
> + SR_FGT(SYS_TCR_EL1, HFGxTR, TCR_EL1, 1),
> + SR_FGT(SYS_SCXTNUM_EL0, HFGxTR, SCXTNUM_EL0, 1),
> + SR_FGT(SYS_SCXTNUM_EL1, HFGxTR, SCXTNUM_EL1, 1),
> + SR_FGT(SYS_SCTLR_EL1, HFGxTR, SCTLR_EL1, 1),
> + SR_FGT(SYS_REVIDR_EL1, HFGxTR, REVIDR_EL1, 1),
> + SR_FGT(SYS_PAR_EL1, HFGxTR, PAR_EL1, 1),
> + SR_FGT(SYS_MPIDR_EL1, HFGxTR, MPIDR_EL1, 1),
> + SR_FGT(SYS_MIDR_EL1, HFGxTR, MIDR_EL1, 1),
> + SR_FGT(SYS_MAIR_EL1, HFGxTR, MAIR_EL1, 1),
> + SR_FGT(SYS_LORSA_EL1, HFGxTR, LORSA_EL1, 1),
> + SR_FGT(SYS_LORN_EL1, HFGxTR, LORN_EL1, 1),
> + SR_FGT(SYS_LORID_EL1, HFGxTR, LORID_EL1, 1),
> + SR_FGT(SYS_LOREA_EL1, HFGxTR, LOREA_EL1, 1),
> + SR_FGT(SYS_LORC_EL1, HFGxTR, LORC_EL1, 1),
> + SR_FGT(SYS_ISR_EL1, HFGxTR, ISR_EL1, 1),
> + SR_FGT(SYS_FAR_EL1, HFGxTR, FAR_EL1, 1),
> + SR_FGT(SYS_ESR_EL1, HFGxTR, ESR_EL1, 1),
> + SR_FGT(SYS_DCZID_EL0, HFGxTR, DCZID_EL0, 1),
> + SR_FGT(SYS_CTR_EL0, HFGxTR, CTR_EL0, 1),
> + SR_FGT(SYS_CSSELR_EL1, HFGxTR, CSSELR_EL1, 1),
> + SR_FGT(SYS_CPACR_EL1, HFGxTR, CPACR_EL1, 1),
> + SR_FGT(SYS_CONTEXTIDR_EL1, HFGxTR, CONTEXTIDR_EL1, 1),
> + SR_FGT(SYS_CLIDR_EL1, HFGxTR, CLIDR_EL1, 1),
> + SR_FGT(SYS_CCSIDR_EL1, HFGxTR, CCSIDR_EL1, 1),
> + SR_FGT(SYS_APIBKEYLO_EL1, HFGxTR, APIBKey, 1),
> + SR_FGT(SYS_APIBKEYHI_EL1, HFGxTR, APIBKey, 1),
> + SR_FGT(SYS_APIAKEYLO_EL1, HFGxTR, APIAKey, 1),
> + SR_FGT(SYS_APIAKEYHI_EL1, HFGxTR, APIAKey, 1),
> + SR_FGT(SYS_APGAKEYLO_EL1, HFGxTR, APGAKey, 1),
> + SR_FGT(SYS_APGAKEYHI_EL1, HFGxTR, APGAKey, 1),
> + SR_FGT(SYS_APDBKEYLO_EL1, HFGxTR, APDBKey, 1),
> + SR_FGT(SYS_APDBKEYHI_EL1, HFGxTR, APDBKey, 1),
> + SR_FGT(SYS_APDAKEYLO_EL1, HFGxTR, APDAKey, 1),
> + SR_FGT(SYS_APDAKEYHI_EL1, HFGxTR, APDAKey, 1),
> + SR_FGT(SYS_AMAIR_EL1, HFGxTR, AMAIR_EL1, 1),
> + SR_FGT(SYS_AIDR_EL1, HFGxTR, AIDR_EL1, 1),
> + SR_FGT(SYS_AFSR1_EL1, HFGxTR, AFSR1_EL1, 1),
> + SR_FGT(SYS_AFSR0_EL1, HFGxTR, AFSR0_EL1, 1),
> };
>
> static union trap_config get_trap_config(u32 sysreg)
> @@ -1160,6 +1224,13 @@ bool __check_nv_sr_forward(struct kvm_vcpu *vcpu)
> case __NO_FGT_GROUP__:
> break;
>
> + case HFGxTR_GROUP:
> + if (is_read)
> + val = sanitised_sys_reg(vcpu, HFGRTR_EL2);
> + else
> + val = sanitised_sys_reg(vcpu, HFGWTR_EL2);
> + break;
> +
> case __NR_FGT_GROUP_IDS__:
> /* Something is really wrong, bail out */
> WARN_ONCE(1, "__NR_FGT_GROUP_IDS__");
> --
> 2.34.1
>
Reviewed-by: Jing Zhang <jingzhangos at google.com>
Jing
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