[PATCH V3 3/3] Documentation: coresight: Add cc_threshold tunable

[Mike Leach]

On Fri, 11 Aug 2023 at 04:46, Anshuman Khandual
<anshuman.khandual at arm.com> wrote:
>
> This updates config option to include 'cc_threshold' tunable value.
>
> Cc: Suzuki K Poulose <suzuki.poulose at arm.com>
> Cc: Mike Leach <mike.leach at linaro.org>
> Cc: James Clark <james.clark at arm.com>
> Cc: Jonathan Corbet <corbet at lwn.net>
> Cc: coresight at lists.linaro.org
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: linux-doc at vger.kernel.org
> Cc: linux-kernel at vger.kernel.org
> Signed-off-by: Anshuman Khandual <anshuman.khandual at arm.com>
> ---
>  Documentation/trace/coresight/coresight.rst | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/trace/coresight/coresight.rst b/Documentation/trace/coresight/coresight.rst
> index 4a71ea6cb390..ce55adb80b82 100644
> --- a/Documentation/trace/coresight/coresight.rst
> +++ b/Documentation/trace/coresight/coresight.rst
> @@ -624,6 +624,10 @@ They are also listed in the folder /sys/bus/event_source/devices/cs_etm/format/
>     * - timestamp
>       - Session local version of the system wide setting: :ref:`ETMv4_MODE_TIMESTAMP
>         <coresight-timestamp>`
> +   * - cc_threshold
> +     - Cycle count threshold value. If nothing is provided here or the provided value is 0, then the
> +       default value i.e 0x100 will be used. If provided value is less than minimum cycles threshold
> +       value, as indicated via TRCIDR3.CCITMIN, then the minimum value will be used instead.
>
>  How to use the STM module
>  -------------------------
> --
> 2.25.1
>
Reviewed by: Mike Leach <mike.leach at linaro.org>
-- 
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK