[PATCH v5 2/9] iommu/arm-smmu-v3: Replace s1_cfg with cdtab_cfg

[Will Deacon]

On Wed, Aug 09, 2023 at 10:59:33AM -0300, Jason Gunthorpe wrote:
> On Wed, Aug 09, 2023 at 02:49:41PM +0100, Will Deacon wrote:
> 
> > > @@ -1360,10 +1357,14 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid,
> > >  		    !master->stall_enabled)
> > >  			dst[1] |= cpu_to_le64(STRTAB_STE_1_S1STALLD);
> > >  
> > > -		val |= (s1_cfg->cdcfg.cdtab_dma & STRTAB_STE_0_S1CTXPTR_MASK) |
> > > -			FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_S1_TRANS) |
> > > -			FIELD_PREP(STRTAB_STE_0_S1CDMAX, s1_cfg->s1cdmax) |
> > > -			FIELD_PREP(STRTAB_STE_0_S1FMT, s1_cfg->s1fmt);
> > > +		val |= (cd_table->cdtab_dma & STRTAB_STE_0_S1CTXPTR_MASK) |
> > > +		       FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_S1_TRANS) |
> > > +		       FIELD_PREP(STRTAB_STE_0_S1CDMAX,
> > > +				  cd_table->max_cds_bits) |
> > > +		       FIELD_PREP(STRTAB_STE_0_S1FMT,
> > > +				  cd_table->l1_desc ?
> > > +					  STRTAB_STE_0_S1FMT_64K_L2 :
> > > +					  STRTAB_STE_0_S1FMT_LINEAR);
> > 
> > magically know that we're using 64k tables.
> > 
> > Why is this an improvement to the driver?
> 
> Put the above in a function 
> 
> arm_smmu_get_cd_ste(struct arm_smmu_ctx_desc_cfg *cdtab, void *ste)
> 
> And it makes more sense.

Sorry, but I'm not seeing it :/

> We don't need the driver to precompute the "s1_cfg" parameters and
> store them in a redundant struct along side the ctx_desc_cfg when we
> can compute those same values on the fly with no cost.

But the computation isn't happening -- the STRTAB_STE_0_S1FMT_64K_L2
constant is hardcoded here. If we want to use 4k leaf tables in some
cases, how would you add that? Such a change shouldn't need the low-level
strtab creation code to change.

Will