[PATCH v3 2/2] perf/imx_ddr: don't enable counter0 if none of 4 counters

[Xu Yang]

> -----Original Message-----
> From: Frank Li <frank.li at nxp.com>
> Sent: Tuesday, August 8, 2023 10:43 PM
> To: Xu Yang <xu.yang_2 at nxp.com>
> Cc: will at kernel.org; mark.rutland at arm.com; shawnguo at kernel.org; s.hauer at pengutronix.de; kernel at pengutronix.de;
> dl-linux-imx <linux-imx at nxp.com>; linux-arm-kernel at lists.infradead.org
> Subject: RE: [PATCH v3 2/2] perf/imx_ddr: don't enable counter0 if none of 4 counters
> 
> 
> 
> > -----Original Message-----
> > From: Xu Yang <xu.yang_2 at nxp.com>
> > Sent: Tuesday, August 8, 2023 2:28 AM
> > To: Frank Li <frank.li at nxp.com>
> > Cc: will at kernel.org; mark.rutland at arm.com; shawnguo at kernel.org;
> > s.hauer at pengutronix.de; kernel at pengutronix.de; dl-linux-imx <linux-
> > imx at nxp.com>; linux-arm-kernel at lists.infradead.org
> > Subject: [PATCH v3 2/2] perf/imx_ddr: don't enable counter0 if none of 4
> > counters
> >
> > In current driver, counter0 will be enabled after ddr_perf_pmu_enable()
> > is called even though none of the 4 counters are used. This will cause
> > counter0 continue to count until ddr_perf_pmu_disabled() is called. If
> > pmu is not disabled all the time, the pmu interrupt will be asserted
> > from time to time due to counter0 will overflow and irq handler will
> > clear it. It's not an expected behavior. This patch will not enable
> > counter0 if none of 4 counters are used.
> >
> > Fixes: 9a66d36cc7ac ("drivers/perf: imx_ddr: Add DDR performance counter
> > support to perf")
> > Signed-off-by: Xu Yang <xu.yang_2 at nxp.com>
> >
> > ---
> > Changes in v3:
> >  - don't differentiate cycle counter and other counters
> >  - modify logic in pmu_enable()/pmu_disable()
> > Changes in v2:
> >  - add active events count as suggested from Frank
> > ---
> >  drivers/perf/fsl_imx8_ddr_perf.c | 22 +++++++++++++++-------
> >  1 file changed, 15 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/perf/fsl_imx8_ddr_perf.c
> > b/drivers/perf/fsl_imx8_ddr_perf.c
> > index f8a94c051f41..32deeace2c93 100644
> > --- a/drivers/perf/fsl_imx8_ddr_perf.c
> > +++ b/drivers/perf/fsl_imx8_ddr_perf.c
> > @@ -103,6 +103,7 @@ struct ddr_pmu {
> >  	const struct fsl_ddr_devtype_data *devtype_data;
> >  	int irq;
> >  	int id;
> > +	int active_count;
> >  };
> >
> >  static ssize_t ddr_perf_identifier_show(struct device *dev,
> > @@ -516,6 +517,7 @@ static void ddr_perf_event_start(struct perf_event
> > *event, int flags)
> >
> >  	ddr_perf_counter_enable(pmu, event->attr.config, counter, true);
> >
> > +	pmu->active_count++;
> >  	hwc->state = 0;
> >  }
> >
> > @@ -569,6 +571,7 @@ static void ddr_perf_event_stop(struct perf_event
> > *event, int flags)
> >  	ddr_perf_counter_enable(pmu, event->attr.config, counter, false);
> >  	ddr_perf_event_update(event);
> >
> > +	pmu->active_count--;
> >  	hwc->state |= PERF_HES_STOPPED;
> >  }
> >
> > @@ -588,8 +591,11 @@ static void ddr_perf_pmu_enable(struct pmu *pmu)
> >  {
> >  	struct ddr_pmu *ddr_pmu = to_ddr_pmu(pmu);
> >
> > -	/* enable cycle counter if cycle is not active event list */
> > -	if (ddr_pmu->events[EVENT_CYCLES_COUNTER] == NULL)
> > +	/*
> > +	 * Because counter 1-3 depend on cycle counter, treat cycle
> > +	 * counter as main switch when any counter of the 4 need to run.
> > +	 */
> > +	if (ddr_pmu->active_count > 0)
> >  		ddr_perf_counter_enable(ddr_pmu,
> >  				      EVENT_CYCLES_ID,
> >  				      EVENT_CYCLES_COUNTER,
> > @@ -600,11 +606,13 @@ static void ddr_perf_pmu_disable(struct pmu
> > *pmu)
> >  {
> >  	struct ddr_pmu *ddr_pmu = to_ddr_pmu(pmu);
> >
> > -	if (ddr_pmu->events[EVENT_CYCLES_COUNTER] == NULL)
> > -		ddr_perf_counter_enable(ddr_pmu,
> > -				      EVENT_CYCLES_ID,
> > -				      EVENT_CYCLES_COUNTER,
> > -				      false);
> > +	/*
> > +	 * Counting should be stopped. Disable cycle counter unconditionally.
> > +	 */
> > +	ddr_perf_counter_enable(ddr_pmu,
> > +			      EVENT_CYCLES_ID,
> > +			      EVENT_CYCLES_COUNTER,
> > +			      false);
> 
> What's happen if one event is running in back ground,  but another event try
> to disable it.

pmu_enable() will be called at the end. cycle counter will be reopened finally.

> 
> >  }
> >
> >  static int ddr_perf_init(struct ddr_pmu *pmu, void __iomem *base,
> > --
> > 2.34.1