Disabling the TSCXT bit

Zachary Yedidia zyedidia at stanford.edu
Mon Aug 7 16:49:20 PDT 2023


Hi,

Armv8 has an optional extension called FEAT_CSV2_2 for Spectre v2 mitigation
that appears to be implemented in multiple mainstream CPUs (Apple Macs, Arm
Cortex-A510, A710, A715, X2, X3, and Neoverse N2) and adds software context IDs
(via the system register SCXTNUM_EL0). The TSCXT bit in SCTLR_EL1 controls
whether access to SCXTNUM_EL0 causes a trap or not. It seems like Linux
unconditionally sets this bit to 1, always causing a trap to occur and
essentially rendering the Spectre mitigation unusable. Is that correct, and if
so, is there any plan to enable this feature?

Thanks,
Zach


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