[PATCH] imx8mn-var-som: dts: fix PHY detection bug by adding deassert delay
Hugo Villeneuve
hugo at hugovil.com
Thu Apr 27 13:06:08 PDT 2023
On Thu, 27 Apr 2023 17:00:41 -0300
Fabio Estevam <festevam at gmail.com> wrote:
> Hi Hugo,
>
> On Thu, Apr 27, 2023 at 4:56 PM Hugo Villeneuve <hugo at hugovil.com> wrote:
> >
> > From: Hugo Villeneuve <hvilleneuve at dimonoff.com>
> >
> > While testing the ethernet interface on a symphony carrier
> > board using an imx8mn SOM with an onboard PHY (EC hardware
> > configuration), the ethernet PHY is not detected.
> >
> > The device tree in Variscite custom linux git repository uses the
> > following property:
> >
> > phy-reset-post-delay = <20>;
> >
> > Add a new property 'reset-deassert-us' of 20ms to have the same delay
> > inside the ethphy handle.
>
> Which Ethernet PHY does this board use?
>
> What does its datasheet recommend?
Hi Fabio,
it uses a ADIN1300 PHY.
The datasheet indicate that the "Management interface active (t4)" state is reached at most 5ms after the reset signal is deasserted.
Hugo.
--
Hugo Villeneuve <hugo at hugovil.com>
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