[PATCH v4 4/4] pwm: meson: make full use of common clock framework

[Martin Blumenstingl]

Hello Heiner,

apologies for the late reply - I've been busy with offline things.

On Sun, Apr 16, 2023 at 11:34 PM Heiner Kallweit <hkallweit1 at gmail.com> wrote:
[...]
> >> With a 850MHz input clock we should see a 0.01% duty cycle with 1.2ns
> >> clock pulses. Can we rule out an issue with the measuring equipment?
> >> Is your logic analyzer able to display such short clock pulses?
> > Oh, you're right: my logic analyzer maxes out at 24MHz (~42ns).
> > So we can ignore this case.
> >
> >>> Finally I tried period = 12218, duty cycle = 12218 (typically used for
> >>> the lowest CPU voltage):
> >>> before your patches / after applying your patches:
> >>> PWM: duty cycle: 99.661017% / n/a (constant low output)
> > I have to correct myself: for this case my logic analyzer sees a:
> > constant high signal
> >
> So conclusion is that the PWM output is as expected? If yes, then the
> memory corruption you saw supposedly had another root cause?
You are right:
- For this case my logic analyzer is also too slow
- In the meantime I've been able to reproduce the memory corruption
issue without your patch

> Eventually your Tested-by could be re-instantiated?
Indeed, and in addition to SM1 I have also tested it on Khadas VIM2 (GXM SoC):
[    4.135944] brcmfmac: brcmf_c_preinit_dcmds: Firmware: BCM4356/2
wl0: Apr  9 2021 00:40:07 version 7.35.349.104 (775a9ab CY) FWID
01-64b609e0

Tested-by: Martin Blumenstingl <martin.blumenstingl at googlemail.com>


Best regards,
Martin