[PATCH v2 09/19] KVM: arm64: Save/restore PIE registers

[Marc Zyngier]

On Thu, 13 Apr 2023 12:05:03 +0100,
Joey Gouly <joey.gouly at arm.com> wrote:
> 
> Define the new system registers that PIE introduces and context switch them.
> The PIE feature is still hidden from the ID register, and not exposed to a VM.
> 
> Signed-off-by: Joey Gouly <joey.gouly at arm.com>
> Cc: Marc Zyngier <maz at kernel.org>
> Cc: Oliver Upton <oliver.upton at linux.dev>
> Cc: James Morse <james.morse at arm.com>
> Cc: Suzuki K Poulose <suzuki.poulose at arm.com>
> Cc: Zenghui Yu <yuzenghui at huawei.com>
> Cc: Catalin Marinas <catalin.marinas at arm.com>
> Cc: Will Deacon <will at kernel.org>
> Reviewed-by: Catalin Marinas <catalin.marinas at arm.com>
> ---
>  arch/arm64/include/asm/kvm_host.h          | 4 ++++
>  arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 8 ++++++++
>  arch/arm64/kvm/sys_regs.c                  | 2 ++
>  3 files changed, 14 insertions(+)
> 
> diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
> index e1137832a01f..381bd0763abf 100644
> --- a/arch/arm64/include/asm/kvm_host.h
> +++ b/arch/arm64/include/asm/kvm_host.h
> @@ -367,6 +367,10 @@ enum vcpu_sysreg {
>  	CNTHCTL_EL2,	/* Counter-timer Hypervisor Control register */
>  	SP_EL2,		/* EL2 Stack Pointer */
>  
> +	/* Permission Indirection Extension registers */
> +	PIR_EL1,       /* Permission Indirection Register 1 (EL1) */
> +	PIRE0_EL1,     /*  Permission Indirection Register 0 (EL1) */
> +

nit: please move these EL1 register outside of the EL2 range, as it
becomes significant with NV. Next to the MTE register is as good a
place as any.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.