[PATCH v3 1/5] arm64: dts: ti: k3-j784s4-main: Add system controller and SERDES lane mux

Krzysztof Kozlowski krzysztof.kozlowski at linaro.org
Wed Apr 19 00:49:59 PDT 2023


On 19/04/2023 08:17, Jayesh Choudhary wrote:
> From: Siddharth Vadapalli <s-vadapalli at ti.com>
> 
> The system controller node manages the CTRL_MMR0 region.
> Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux.
> 
> Signed-off-by: Siddharth Vadapalli <s-vadapalli at ti.com>
> [j-choudhary at ti.com: Minor cleanup to fix dtc warnings]
> Signed-off-by: Jayesh Choudhary <j-choudhary at ti.com>
> ---
>  arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> index e9169eb358c1..5fb7edf4f5a0 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> @@ -5,6 +5,9 @@
>   * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
>   */
>  
> +#include <dt-bindings/mux/mux.h>
> +#include <dt-bindings/mux/ti-serdes.h>
> +
>  &cbass_main {
>  	msmc_ram: sram at 70000000 {
>  		compatible = "mmio-sram";
> @@ -26,6 +29,25 @@ l3cache-sram at 200000 {
>  		};
>  	};
>  
> +	scm_conf: syscon at 100000 {
> +		compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
> +		reg = <0x00 0x00100000 0x00 0x1c000>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges = <0x00 0x00 0x00100000 0x1c000>;
> +
> +		serdes_ln_ctrl: mux-controller-4080 {

Does not look like you tested the DTS against bindings. Please run `make
dtbs_check` (see Documentation/devicetree/bindings/writing-schema.rst
for instructions).


Best regards,
Krzysztof




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