[PATCH V3 1/9] dt-bindings: arm64: Add IPQ5018 clock and reset

[Krzysztof Kozlowski]

On 14/04/2023 12:29, Sricharan Ramabadhran wrote:
> This patch adds support for the global clock controller found on
> the IPQ5018 based devices.
> 
> Co-developed-by: Varadarajan Narayanan <quic_varada at quicinc.com>
> Signed-off-by: Varadarajan Narayanan <quic_varada at quicinc.com>
> Signed-off-by: Sricharan Ramabadhran <quic_srichara at quicinc.com>
> ---
>  [v3] Fixed review comments and dts schema warnings
> 
>  .../bindings/clock/qcom,ipq5018-gcc.yaml           |  63 +++++++
>  include/dt-bindings/clock/qcom,gcc-ipq5018.h       | 183 +++++++++++++++++++++
>  include/dt-bindings/reset/qcom,gcc-ipq5018.h       | 122 ++++++++++++++
>  3 files changed, 368 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/qcom,ipq5018-gcc.yaml
>  create mode 100644 include/dt-bindings/clock/qcom,gcc-ipq5018.h
>  create mode 100644 include/dt-bindings/reset/qcom,gcc-ipq5018.h
> 
> diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5018-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5018-gcc.yaml
> new file mode 100644
> index 0000000..f94a699
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,ipq5018-gcc.yaml
> @@ -0,0 +1,63 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/qcom,ipq5018-gcc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Global Clock & Reset Controller on IPQ5018
> +
> +maintainers:
> +  - Sricharan Ramabadhran <quic_srichara at quicinc.com>
> +
> +description: |
> +  Qualcomm global clock control module provides the clocks, resets and power
> +  domains on IPQ5018
> +
> +  See also::
> +    include/dt-bindings/clock/qcom,ipq5018-gcc.h
> +    include/dt-bindings/reset/qcom,ipq5018-gcc.h
> +
> +properties:
> +  compatible:
> +    const: qcom,ipq5018-gcc
> +
> +  clocks:
> +    items:
> +      - description: Board XO source
> +      - description: Sleep clock source
> +      - description: PCIE20 PHY0 pipe clock source
> +      - description: PCIE20 PHY1 pipe clock source
> +      - description: USB3 PHY pipe clock source
> +      - description: GEPHY RX clock source
> +      - description: GEPHY TX clock source
> +      - description: UNIPHY RX clock source
> +      - description: UNIPHY TX clk source
> +
> +required:
> +  - compatible
> +  - clocks
> +
> +allOf:
> +  - $ref: qcom,gcc.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    clock-controller at 1800000 {
> +      compatible = "qcom,ipq5018-gcc";
> +      reg = <0x01800000 0x80000>;
> +      clocks = <&xo_board_clk>,
> +               <&sleep_clk>,
> +               <&pcie20_phy0_pipe_clk>,
> +               <&pcie20_phy1_pipe_clk>,
> +               <&usb3_phy0_pipe_clk>,
> +               <&gephy_rx_clk>,
> +               <&gephy_tx_clk>,
> +               <&uniphy_rx_clk>,
> +               <&uniphy_tx_clk>;
> +      #clock-cells = <1>;
> +      #reset-cells = <1>;
> +      #power-domain-cells = <1>;
> +    };
> +...
> diff --git a/include/dt-bindings/clock/qcom,gcc-ipq5018.h b/include/dt-bindings/clock/qcom,gcc-ipq5018.h
> new file mode 100644
> index 0000000..f3de2fd
> --- /dev/null
> +++ b/include/dt-bindings/clock/qcom,gcc-ipq5018.h
> @@ -0,0 +1,183 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +/*
> + * Copyright (c) 2023, The Linux Foundation. All rights reserved.

Are you sure about the copyrights that they are attributed to Linux
Foundation? CodeAurora is long gone, so this is a bit surprising.

Anyway, fine with me:

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>

Best regards,
Krzysztof