[PATCH v2 01/19] arm64/sysreg: Add ID register ID_AA64MMFR3

[Joey Gouly]

Add the new ID register ID_AA64MMFR3.

Signed-off-by: Joey Gouly <joey.gouly at arm.com>
Cc: Catalin Marinas <catalin.marinas at arm.com>
Cc: Will Deacon <will at kernel.org>
Cc: Mark Brown <broonie at kernel.org>
---
 arch/arm64/tools/sysreg | 66 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 2af92b4f4fe4..0acbc2112f1e 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -1538,6 +1538,72 @@ UnsignedEnum	3:0	CnP
 EndEnum
 EndSysreg
 
+Sysreg	ID_AA64MMFR3_EL1	3	0	0	7	3
+Enum	63:60	Spec_FPACC
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+Enum	59:56	ADERR
+	0b0000	NI
+	0b0001	DEV_ASYNC
+	0b0010	FEAT_ADERR
+EndEnum
+Enum	55:52	SDERR
+	0b0000	NI
+	0b0001	DEV_SYNC
+	0b0001	FEAT_SDERR
+EndEnum
+Res0	51:48
+Enum	47:44	ANERR
+	0b0000	ASYNC
+	0b0001	FEAT_ANERR
+EndEnum
+Enum	43:40	SNERR
+	0b0000	SYNC
+	0b0001	FEAT_SNERR
+EndEnum
+Enum	39:36	D128_2
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+Enum	35:32	D128
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+Enum	31:28	MEC
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+Enum	27:24	AIE
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+Enum	23:20	S2POE
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+Enum	19:16	S1POE
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+Enum	15:12	S2PIE
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+Enum	11:8	S1PIE
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+Enum	7:4	SCTLRX
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+Enum	3:0	TCRX
+	0b0000	NI
+	0b0001	IMP
+EndEnum
+EndSysreg
+
 Sysreg	SCTLR_EL1	3	0	1	0	0
 Field	63	TIDCP
 Field	62	SPINTMASK
-- 
2.25.1